halcmd show param > show_param_all.txt Parameters: Owner Type Dir Value Name 55 s32 RW 2996 estop.invert.tmax 55 bit RO FALSE estop.invert.tmax-increased 37 bit RW FALSE hm2_7i80.0.encoder.00.0.sel0.invert_output 37 bit RW FALSE hm2_7i80.0.encoder.00.0.sel0.is_opendrain 37 bit RW FALSE hm2_7i80.0.encoder.00.1.sel0.invert_output 37 bit RW FALSE hm2_7i80.0.encoder.00.1.sel0.is_opendrain 37 bit RW FALSE hm2_7i80.0.encoder.00.counter-mode 37 bit RW TRUE hm2_7i80.0.encoder.00.filter 37 bit RW FALSE hm2_7i80.0.encoder.00.index-invert 37 bit RW FALSE hm2_7i80.0.encoder.00.index-mask 37 bit RW FALSE hm2_7i80.0.encoder.00.index-mask-invert 37 float RW 10000 hm2_7i80.0.encoder.00.scale 37 float RW 0.5 hm2_7i80.0.encoder.00.vel-timeout 37 bit RW FALSE hm2_7i80.0.encoder.01.counter-mode 37 bit RW TRUE hm2_7i80.0.encoder.01.filter 37 bit RW FALSE hm2_7i80.0.encoder.01.index-invert 37 bit RW FALSE hm2_7i80.0.encoder.01.index-mask 37 bit RW FALSE hm2_7i80.0.encoder.01.index-mask-invert 37 float RW 1 hm2_7i80.0.encoder.01.scale 37 float RW 0.5 hm2_7i80.0.encoder.01.vel-timeout 37 bit RW FALSE hm2_7i80.0.encoder.02.counter-mode 37 bit RW TRUE hm2_7i80.0.encoder.02.filter 37 bit RW FALSE hm2_7i80.0.encoder.02.index-invert 37 bit RW FALSE hm2_7i80.0.encoder.02.index-mask 37 bit RW FALSE hm2_7i80.0.encoder.02.index-mask-invert 37 float RW 1 hm2_7i80.0.encoder.02.scale 37 float RW 0.5 hm2_7i80.0.encoder.02.vel-timeout 37 bit RW FALSE hm2_7i80.0.encoder.03.counter-mode 37 bit RW TRUE hm2_7i80.0.encoder.03.filter 37 bit RW FALSE hm2_7i80.0.encoder.03.index-invert 37 bit RW FALSE hm2_7i80.0.encoder.03.index-mask 37 bit RW FALSE hm2_7i80.0.encoder.03.index-mask-invert 37 float RW 1 hm2_7i80.0.encoder.03.scale 37 float RW 0.5 hm2_7i80.0.encoder.03.vel-timeout 37 bit RW FALSE hm2_7i80.0.encoder.04.counter-mode 37 bit RW TRUE hm2_7i80.0.encoder.04.filter 37 bit RW FALSE hm2_7i80.0.encoder.04.index-invert 37 bit RW FALSE hm2_7i80.0.encoder.04.index-mask 37 bit RW FALSE hm2_7i80.0.encoder.04.index-mask-invert 37 float RW 1 hm2_7i80.0.encoder.04.scale 37 float RW 0.5 hm2_7i80.0.encoder.04.vel-timeout 37 bit RW FALSE hm2_7i80.0.encoder.05.counter-mode 37 bit RW TRUE hm2_7i80.0.encoder.05.filter 37 bit RW FALSE hm2_7i80.0.encoder.05.index-invert 37 bit RW FALSE hm2_7i80.0.encoder.05.index-mask 37 bit RW FALSE hm2_7i80.0.encoder.05.index-mask-invert 37 float RW 1 hm2_7i80.0.encoder.05.scale 37 float RW 0.5 hm2_7i80.0.encoder.05.vel-timeout 37 bit RW FALSE hm2_7i80.0.encoder.06.counter-mode 37 bit RW TRUE hm2_7i80.0.encoder.06.filter 37 bit RW FALSE hm2_7i80.0.encoder.06.index-invert 37 bit RW FALSE hm2_7i80.0.encoder.06.index-mask 37 bit RW FALSE hm2_7i80.0.encoder.06.index-mask-invert 37 float RW 1 hm2_7i80.0.encoder.06.scale 37 float RW 0.5 hm2_7i80.0.encoder.06.vel-timeout 37 bit RW FALSE hm2_7i80.0.encoder.07.counter-mode 37 bit RW TRUE hm2_7i80.0.encoder.07.filter 37 bit RW FALSE hm2_7i80.0.encoder.07.index-invert 37 bit RW FALSE hm2_7i80.0.encoder.07.index-mask 37 bit RW FALSE hm2_7i80.0.encoder.07.index-mask-invert 37 float RW 1 hm2_7i80.0.encoder.07.scale 37 float RW 0.5 hm2_7i80.0.encoder.07.vel-timeout 37 bit RW FALSE hm2_7i80.0.encoder.08.counter-mode 37 bit RW TRUE hm2_7i80.0.encoder.08.filter 37 bit RW FALSE hm2_7i80.0.encoder.08.index-invert 37 bit RW FALSE hm2_7i80.0.encoder.08.index-mask 37 bit RW FALSE hm2_7i80.0.encoder.08.index-mask-invert 37 float RW 1 hm2_7i80.0.encoder.08.scale 37 float RW 0.5 hm2_7i80.0.encoder.08.vel-timeout 37 bit RW FALSE hm2_7i80.0.encoder.09.counter-mode 37 bit RW TRUE hm2_7i80.0.encoder.09.filter 37 bit RW FALSE hm2_7i80.0.encoder.09.index-invert 37 bit RW FALSE hm2_7i80.0.encoder.09.index-mask 37 bit RW FALSE hm2_7i80.0.encoder.09.index-mask-invert 37 float RW 1 hm2_7i80.0.encoder.09.scale 37 float RW 0.5 hm2_7i80.0.encoder.09.vel-timeout 37 bit RW FALSE hm2_7i80.0.gpio.007.invert_output 37 bit RW FALSE hm2_7i80.0.gpio.007.is_opendrain 37 bit RW FALSE hm2_7i80.0.gpio.007.is_output 37 bit RW FALSE hm2_7i80.0.gpio.008.invert_output 37 bit RW FALSE hm2_7i80.0.gpio.008.is_opendrain 37 bit RW FALSE hm2_7i80.0.gpio.008.is_output 37 bit RW FALSE hm2_7i80.0.gpio.009.invert_output 37 bit RW FALSE hm2_7i80.0.gpio.009.is_opendrain 37 bit RW FALSE hm2_7i80.0.gpio.009.is_output 37 bit RW FALSE hm2_7i80.0.gpio.019.invert_output 37 bit RW FALSE hm2_7i80.0.gpio.019.is_opendrain 37 bit RW FALSE hm2_7i80.0.gpio.020.invert_output 37 bit RW FALSE hm2_7i80.0.gpio.020.is_opendrain 37 bit RW FALSE hm2_7i80.0.gpio.021.invert_output 37 bit RW FALSE hm2_7i80.0.gpio.021.is_opendrain 37 bit RW FALSE hm2_7i80.0.gpio.022.invert_output 37 bit RW FALSE hm2_7i80.0.gpio.022.is_opendrain 37 bit RW FALSE hm2_7i80.0.gpio.023.invert_output 37 bit RW FALSE hm2_7i80.0.gpio.023.is_opendrain 37 bit RW FALSE hm2_7i80.0.gpio.048.invert_output 37 bit RW FALSE hm2_7i80.0.gpio.048.is_opendrain 37 bit RW FALSE hm2_7i80.0.gpio.048.is_output 37 bit RW FALSE hm2_7i80.0.gpio.049.invert_output 37 bit RW FALSE hm2_7i80.0.gpio.049.is_opendrain 37 bit RW FALSE hm2_7i80.0.gpio.049.is_output 37 bit RW FALSE hm2_7i80.0.gpio.050.invert_output 37 bit RW FALSE hm2_7i80.0.gpio.050.is_opendrain 37 bit RW FALSE hm2_7i80.0.gpio.050.is_output 37 bit RW FALSE hm2_7i80.0.gpio.051.invert_output 37 bit RW FALSE hm2_7i80.0.gpio.051.is_opendrain 37 bit RW FALSE hm2_7i80.0.gpio.051.is_output 37 bit RW FALSE hm2_7i80.0.gpio.052.invert_output 37 bit RW FALSE hm2_7i80.0.gpio.052.is_opendrain 37 bit RW FALSE hm2_7i80.0.gpio.052.is_output 37 bit RW FALSE hm2_7i80.0.gpio.053.invert_output 37 bit RW FALSE hm2_7i80.0.gpio.053.is_opendrain 37 bit RW FALSE hm2_7i80.0.gpio.053.is_output 37 bit RW FALSE hm2_7i80.0.gpio.054.invert_output 37 bit RW FALSE hm2_7i80.0.gpio.054.is_opendrain 37 bit RW FALSE hm2_7i80.0.gpio.054.is_output 37 bit RW FALSE hm2_7i80.0.gpio.055.invert_output 37 bit RW FALSE hm2_7i80.0.gpio.055.is_opendrain 37 bit RW FALSE hm2_7i80.0.gpio.055.is_output 37 bit RW FALSE hm2_7i80.0.gpio.056.invert_output 37 bit RW FALSE hm2_7i80.0.gpio.056.is_opendrain 37 bit RW FALSE hm2_7i80.0.gpio.056.is_output 37 bit RW FALSE hm2_7i80.0.gpio.057.invert_output 37 bit RW FALSE hm2_7i80.0.gpio.057.is_opendrain 37 bit RW FALSE hm2_7i80.0.gpio.057.is_output 37 bit RW FALSE hm2_7i80.0.gpio.058.invert_output 37 bit RW FALSE hm2_7i80.0.gpio.058.is_opendrain 37 bit RW FALSE hm2_7i80.0.gpio.058.is_output 37 bit RW FALSE hm2_7i80.0.gpio.059.invert_output 37 bit RW FALSE hm2_7i80.0.gpio.059.is_opendrain 37 bit RW FALSE hm2_7i80.0.gpio.059.is_output 37 bit RW FALSE hm2_7i80.0.gpio.060.invert_output 37 bit RW FALSE hm2_7i80.0.gpio.060.is_opendrain 37 bit RW FALSE hm2_7i80.0.gpio.060.is_output 37 bit RW FALSE hm2_7i80.0.gpio.061.invert_output 37 bit RW FALSE hm2_7i80.0.gpio.061.is_opendrain 37 bit RW FALSE hm2_7i80.0.gpio.061.is_output 37 bit RW FALSE hm2_7i80.0.gpio.062.invert_output 37 bit RW FALSE hm2_7i80.0.gpio.062.is_opendrain 37 bit RW FALSE hm2_7i80.0.gpio.062.is_output 37 bit RW FALSE hm2_7i80.0.gpio.063.invert_output 37 bit RW FALSE hm2_7i80.0.gpio.063.is_opendrain 37 bit RW FALSE hm2_7i80.0.gpio.063.is_output 37 bit RW FALSE hm2_7i80.0.gpio.064.invert_output 37 bit RW FALSE hm2_7i80.0.gpio.064.is_opendrain 37 bit RW FALSE hm2_7i80.0.gpio.064.is_output 37 bit RW FALSE hm2_7i80.0.gpio.065.invert_output 37 bit RW FALSE hm2_7i80.0.gpio.065.is_opendrain 37 bit RW FALSE hm2_7i80.0.gpio.065.is_output 37 bit RW FALSE hm2_7i80.0.gpio.066.invert_output 37 bit RW FALSE hm2_7i80.0.gpio.066.is_opendrain 37 bit RW FALSE hm2_7i80.0.gpio.066.is_output 37 bit RW FALSE hm2_7i80.0.gpio.067.invert_output 37 bit RW FALSE hm2_7i80.0.gpio.067.is_opendrain 37 bit RW FALSE hm2_7i80.0.gpio.067.is_output 37 bit RW FALSE hm2_7i80.0.gpio.068.invert_output 37 bit RW FALSE hm2_7i80.0.gpio.068.is_opendrain 37 bit RW FALSE hm2_7i80.0.gpio.068.is_output 37 bit RW FALSE hm2_7i80.0.gpio.069.invert_output 37 bit RW FALSE hm2_7i80.0.gpio.069.is_opendrain 37 bit RW FALSE hm2_7i80.0.gpio.069.is_output 37 bit RW FALSE hm2_7i80.0.gpio.070.invert_output 37 bit RW FALSE hm2_7i80.0.gpio.070.is_opendrain 37 bit RW FALSE hm2_7i80.0.gpio.070.is_output 37 bit RW FALSE hm2_7i80.0.gpio.071.invert_output 37 bit RW FALSE hm2_7i80.0.gpio.071.is_opendrain 37 bit RW FALSE hm2_7i80.0.gpio.071.is_output 37 bit RW FALSE hm2_7i80.0.inmux.00.enc0_4xmode 37 bit RW FALSE hm2_7i80.0.inmux.00.enc1_4xmode 37 bit RW FALSE hm2_7i80.0.inmux.00.enc2_4xmode 37 bit RW FALSE hm2_7i80.0.inmux.00.enc3_4xmode 37 u32 RW 0x00000005 hm2_7i80.0.inmux.00.fast_scans 37 u32 RW 0x00004E20 hm2_7i80.0.inmux.00.scan_rate 37 u32 RO 0x00000020 hm2_7i80.0.inmux.00.scan_width 37 u32 RW 0x000001F4 hm2_7i80.0.inmux.00.slow_scans 37 bit RW FALSE hm2_7i80.0.io_error 37 s32 RO 1 hm2_7i80.0.packet-error-decrement 37 s32 RW 2 hm2_7i80.0.packet-error-increment 37 s32 RW 10 hm2_7i80.0.packet-error-limit 37 s32 RW 80 hm2_7i80.0.packet-read-timeout 37 bit RW FALSE hm2_7i80.0.pwmgen.00.0.enable.invert_output 37 bit RW FALSE hm2_7i80.0.pwmgen.00.0.enable.is_opendrain 37 bit RW FALSE hm2_7i80.0.pwmgen.00.1.enable.invert_output 37 bit RW FALSE hm2_7i80.0.pwmgen.00.1.enable.is_opendrain 37 bit RW FALSE hm2_7i80.0.pwmgen.00.2.enable.invert_output 37 bit RW FALSE hm2_7i80.0.pwmgen.00.2.enable.is_opendrain 37 bit RW TRUE hm2_7i80.0.pwmgen.00.dither 37 bit RW TRUE hm2_7i80.0.pwmgen.00.offset-mode 37 bit RW FALSE hm2_7i80.0.pwmgen.00.out0.invert_output 37 bit RW FALSE hm2_7i80.0.pwmgen.00.out0.is_opendrain 37 s32 RW 1 hm2_7i80.0.pwmgen.00.output-type 37 float RW 1 hm2_7i80.0.pwmgen.00.scale 37 bit RW TRUE hm2_7i80.0.pwmgen.01.dither 37 bit RW FALSE hm2_7i80.0.pwmgen.01.enable.invert_output 37 bit RW FALSE hm2_7i80.0.pwmgen.01.enable.is_opendrain 37 bit RW TRUE hm2_7i80.0.pwmgen.01.offset-mode 37 bit RW FALSE hm2_7i80.0.pwmgen.01.out0.invert_output 37 bit RW FALSE hm2_7i80.0.pwmgen.01.out0.is_opendrain 37 s32 RW 1 hm2_7i80.0.pwmgen.01.output-type 37 float RW 1 hm2_7i80.0.pwmgen.01.scale 37 bit RW TRUE hm2_7i80.0.pwmgen.02.dither 37 bit RW FALSE hm2_7i80.0.pwmgen.02.enable.invert_output 37 bit RW FALSE hm2_7i80.0.pwmgen.02.enable.is_opendrain 37 bit RW TRUE hm2_7i80.0.pwmgen.02.offset-mode 37 bit RW FALSE hm2_7i80.0.pwmgen.02.out0.invert_output 37 bit RW FALSE hm2_7i80.0.pwmgen.02.out0.is_opendrain 37 s32 RW 1 hm2_7i80.0.pwmgen.02.output-type 37 float RW 1 hm2_7i80.0.pwmgen.02.scale 37 bit RW TRUE hm2_7i80.0.pwmgen.03.dither 37 bit RW FALSE hm2_7i80.0.pwmgen.03.enable.invert_output 37 bit RW FALSE hm2_7i80.0.pwmgen.03.enable.is_opendrain 37 bit RW TRUE hm2_7i80.0.pwmgen.03.offset-mode 37 bit RW FALSE hm2_7i80.0.pwmgen.03.out0.invert_output 37 bit RW FALSE hm2_7i80.0.pwmgen.03.out0.is_opendrain 37 s32 RW 1 hm2_7i80.0.pwmgen.03.output-type 37 float RW 1 hm2_7i80.0.pwmgen.03.scale 37 bit RW FALSE hm2_7i80.0.pwmgen.04.dither 37 bit RW FALSE hm2_7i80.0.pwmgen.04.offset-mode 37 bit RW FALSE hm2_7i80.0.pwmgen.04.out0.invert_output 37 bit RW FALSE hm2_7i80.0.pwmgen.04.out0.is_opendrain 37 bit RW FALSE hm2_7i80.0.pwmgen.04.out1.invert_output 37 bit RW FALSE hm2_7i80.0.pwmgen.04.out1.is_opendrain 37 s32 RW 1 hm2_7i80.0.pwmgen.04.output-type 37 float RW 1 hm2_7i80.0.pwmgen.04.scale 37 bit RW FALSE hm2_7i80.0.pwmgen.05.dither 37 bit RW FALSE hm2_7i80.0.pwmgen.05.offset-mode 37 bit RW FALSE hm2_7i80.0.pwmgen.05.out0.invert_output 37 bit RW FALSE hm2_7i80.0.pwmgen.05.out0.is_opendrain 37 bit RW FALSE hm2_7i80.0.pwmgen.05.out1.invert_output 37 bit RW FALSE hm2_7i80.0.pwmgen.05.out1.is_opendrain 37 s32 RW 1 hm2_7i80.0.pwmgen.05.output-type 37 float RW 1 hm2_7i80.0.pwmgen.05.scale 37 bit RW FALSE hm2_7i80.0.pwmgen.06.dither 37 bit RW FALSE hm2_7i80.0.pwmgen.06.offset-mode 37 bit RW FALSE hm2_7i80.0.pwmgen.06.out0.invert_output 37 bit RW FALSE hm2_7i80.0.pwmgen.06.out0.is_opendrain 37 bit RW FALSE hm2_7i80.0.pwmgen.06.out1.invert_output 37 bit RW FALSE hm2_7i80.0.pwmgen.06.out1.is_opendrain 37 s32 RW 1 hm2_7i80.0.pwmgen.06.output-type 37 float RW 1 hm2_7i80.0.pwmgen.06.scale 37 bit RW FALSE hm2_7i80.0.pwmgen.07.dither 37 bit RW FALSE hm2_7i80.0.pwmgen.07.offset-mode 37 bit RW FALSE hm2_7i80.0.pwmgen.07.out0.invert_output 37 bit RW FALSE hm2_7i80.0.pwmgen.07.out0.is_opendrain 37 bit RW FALSE hm2_7i80.0.pwmgen.07.out1.invert_output 37 bit RW FALSE hm2_7i80.0.pwmgen.07.out1.is_opendrain 37 s32 RW 1 hm2_7i80.0.pwmgen.07.output-type 37 float RW 1 hm2_7i80.0.pwmgen.07.scale 37 bit RW FALSE hm2_7i80.0.pwmgen.08.dither 37 bit RW FALSE hm2_7i80.0.pwmgen.08.offset-mode 37 bit RW FALSE hm2_7i80.0.pwmgen.08.out0.invert_output 37 bit RW FALSE hm2_7i80.0.pwmgen.08.out0.is_opendrain 37 bit RW FALSE hm2_7i80.0.pwmgen.08.out1.invert_output 37 bit RW FALSE hm2_7i80.0.pwmgen.08.out1.is_opendrain 37 s32 RW 1 hm2_7i80.0.pwmgen.08.output-type 37 float RW 1 hm2_7i80.0.pwmgen.08.scale 37 bit RW FALSE hm2_7i80.0.pwmgen.09.dither 37 bit RW FALSE hm2_7i80.0.pwmgen.09.offset-mode 37 bit RW FALSE hm2_7i80.0.pwmgen.09.out0.invert_output 37 bit RW FALSE hm2_7i80.0.pwmgen.09.out0.is_opendrain 37 bit RW FALSE hm2_7i80.0.pwmgen.09.out1.invert_output 37 bit RW FALSE hm2_7i80.0.pwmgen.09.out1.is_opendrain 37 s32 RW 1 hm2_7i80.0.pwmgen.09.output-type 37 float RW 1 hm2_7i80.0.pwmgen.09.scale 37 u32 RW 0x0000BB80 hm2_7i80.0.pwmgen.pdm_frequency 37 u32 RW 0x0000BB80 hm2_7i80.0.pwmgen.pwm_frequency 37 s32 RW 0 hm2_7i80.0.read-request.tmax 37 bit RO FALSE hm2_7i80.0.read-request.tmax-increased 37 s32 RW 216069 hm2_7i80.0.read.tmax 37 bit RO FALSE hm2_7i80.0.read.tmax-increased 37 u32 RW 0x004C4B40 hm2_7i80.0.watchdog.timeout_ns 37 s32 RW 53934 hm2_7i80.0.write.tmax 37 bit RO FALSE hm2_7i80.0.write.tmax-increased 43 s32 RW 4379 j3.limit3.tmax 43 bit RO FALSE j3.limit3.tmax-increased 49 s32 RW 3379 j3.pid.do-pid-calcs.tmax 49 bit RO FALSE j3.pid.do-pid-calcs.tmax-increased 43 s32 RW 4963 j4.limit3.tmax 43 bit RO FALSE j4.limit3.tmax-increased 49 s32 RW 3068 j4.pid.do-pid-calcs.tmax 49 bit RO FALSE j4.pid.do-pid-calcs.tmax-increased 43 s32 RW 5345 j5.limit3.tmax 43 bit RO FALSE j5.limit3.tmax-increased 49 s32 RW 5496 j5.pid.do-pid-calcs.tmax 49 bit RO FALSE j5.pid.do-pid-calcs.tmax-increased 40 s32 RW 2959 j6.and2.homed.tmax 40 bit RO FALSE j6.and2.homed.tmax-increased 40 s32 RW 2621 j6.and2.servo-enable.tmax 40 bit RO FALSE j6.and2.servo-enable.tmax-increased 40 s32 RW 1460 j6.and2.stable.tmax 40 bit RO FALSE j6.and2.stable.tmax-increased 43 s32 RW 3288 j6.limit3.tmax 43 bit RO FALSE j6.limit3.tmax-increased 52 float RW 0.01 j6.near.position.difference 52 float RW 1 j6.near.position.scale 52 s32 RW 3581 j6.near.position.tmax 52 bit RO FALSE j6.near.position.tmax-increased 52 float RW 0.001 j6.near.velocity.difference 52 float RW 1 j6.near.velocity.scale 52 s32 RW 1693 j6.near.velocity.tmax 52 bit RO FALSE j6.near.velocity.tmax-increased 49 s32 RW 5266 j6.pid.do-pid-calcs.tmax 49 bit RO FALSE j6.pid.do-pid-calcs.tmax-increased 55 s32 RW 2046 j6.stable.invert.tmax 55 bit RO FALSE j6.stable.invert.tmax-increased 61 s32 RW 3098 j6.timedelay.servo-power.tmax 61 bit RO FALSE j6.timedelay.servo-power.tmax-increased 64 float RW 3 j6.ton.stable.pt 64 s32 RW 3807 j6.ton.stable.tmax 64 bit RO FALSE j6.ton.stable.tmax-increased 43 s32 RW 2522 j7.limit3.tmax 43 bit RO FALSE j7.limit3.tmax-increased 49 s32 RW 3495 j7.pid.do-pid-calcs.tmax 49 bit RO FALSE j7.pid.do-pid-calcs.tmax-increased 43 s32 RW 2623 j8.limit3.tmax 43 bit RO FALSE j8.limit3.tmax-increased 49 s32 RW 3058 j8.pid.do-pid-calcs.tmax 49 bit RO FALSE j8.pid.do-pid-calcs.tmax-increased 31 u32 RW 0x000F4240 lcec.0.pll-max-err 31 u32 RW 0x000003E8 lcec.0.pll-step 31 s32 RW 0 lcec.0.read.tmax 31 bit RO FALSE lcec.0.read.tmax-increased 31 s32 RW 0 lcec.0.write.tmax 31 bit RO FALSE lcec.0.write.tmax-increased 31 s32 RW 38777 lcec.read-all.tmax 31 bit RO FALSE lcec.read-all.tmax-increased 31 s32 RW 31223 lcec.write-all.tmax 31 bit RO FALSE lcec.write-all.tmax-increased 23 s32 RW 4487 motion-command-handler.tmax 23 bit RO FALSE motion-command-handler.tmax-increased 23 s32 RW 45660 motion-controller.tmax 23 bit RO FALSE motion-controller.tmax-increased 23 bit RO FALSE motion.debug-bit-0 23 bit RO FALSE motion.debug-bit-1 23 float RO 0 motion.debug-float-0 23 float RO 0 motion.debug-float-1 23 float RO 0 motion.debug-float-2 23 float RO 1 motion.debug-float-3 23 s32 RO 0 motion.debug-s32-0 23 s32 RO 0 motion.debug-s32-1 24 s32 RW 323337 servo-thread.tmax 23 float RO 0 tc.0.acc 23 float RO 0 tc.0.pos 23 float RO 0 tc.0.vel 23 float RO 0 tc.1.acc 23 float RO 0 tc.1.pos 23 float RO 0 tc.1.vel 23 float RO 0 tc.2.acc 23 float RO 0 tc.2.pos 23 float RO 0 tc.2.vel 23 float RO 0 tc.3.acc 23 float RO 0 tc.3.pos 23 float RO 0 tc.3.vel 23 u32 RO 0x00000000 traj.active_tc 23 float RO 0 traj.pos_out 23 float RO 0 traj.vel_out 58 s32 RW 5603 y.4-0-or8.tmax 58 bit RO FALSE y.4-0-or8.tmax-increased 58 s32 RW 2871 y.5-0-or8.tmax 58 bit RO FALSE y.5-0-or8.tmax-increased 58 s32 RW 2779 y.8-4-or8.tmax 58 bit RO FALSE y.8-4-or8.tmax-increased 40 s32 RW 2973 y.and2.enable.tmax 40 bit RO FALSE y.and2.enable.tmax-increased 58 s32 RW 2690 y.cr200-or8.tmax 58 bit RO FALSE y.cr200-or8.tmax-increased 58 s32 RW 5290 y.cr201-or8.tmax 58 bit RO FALSE y.cr201-or8.tmax-increased 58 s32 RW 2000 y.cr202-or8.tmax 58 bit RO FALSE y.cr202-or8.tmax-increased 58 s32 RW 2003 y.cr203-or8.tmax 58 bit RO FALSE y.cr203-or8.tmax-increased 46 s32 RW 2627 y.mux4.pwm.tmax 46 bit RO FALSE y.mux4.pwm.tmax-increased