36  bit   IN           TRUE  hm2_7i97.0.pwmgen.00.enable <== x-enable
    36  float IN           -2.5  hm2_7i97.0.pwmgen.00.value <== x-output
    36  bit   IN           TRUE  hm2_7i97.0.pwmgen.01.enable <== y-enable
    36  float IN              0  hm2_7i97.0.pwmgen.01.value <== y-output
    36  bit   IN           TRUE  hm2_7i97.0.pwmgen.02.enable <== z-enable
    36  float IN              0  hm2_7i97.0.pwmgen.02.value <== z-output
    36  bit   IN          FALSE  hm2_7i97.0.pwmgen.03.enable
    36  float IN              0  hm2_7i97.0.pwmgen.03.value
    36  bit   IN          FALSE  hm2_7i97.0.pwmgen.04.enable
    36  float IN              0  hm2_7i97.0.pwmgen.04.value
    36  bit   IN          FALSE  hm2_7i97.0.pwmgen.05.enable <== spindle-enable
    36  float IN              0  hm2_7i97.0.pwmgen.05.value <== spindle-output
                         ==> hm2_7i97.0.pwmgen.05.enable
                         ==> hm2_7i97.0.pwmgen.05.value
                         ==> hm2_7i97.0.pwmgen.00.enable
                         ==> hm2_7i97.0.pwmgen.00.value
                         ==> hm2_7i97.0.pwmgen.01.enable
                         ==> hm2_7i97.0.pwmgen.01.value
                         ==> hm2_7i97.0.pwmgen.02.enable
                         ==> hm2_7i97.0.pwmgen.02.value
    36  bit   RW          FALSE  hm2_7i97.0.pwmgen.00.dither
    36  bit   RW          FALSE  hm2_7i97.0.pwmgen.00.enable.invert_output
    36  bit   RW          FALSE  hm2_7i97.0.pwmgen.00.enable.is_opendrain
    36  bit   RW           TRUE  hm2_7i97.0.pwmgen.00.offset-mode
    36  bit   RW          FALSE  hm2_7i97.0.pwmgen.00.out0.invert_output
    36  bit   RW          FALSE  hm2_7i97.0.pwmgen.00.out0.is_opendrain
    36  s32   RW              1  hm2_7i97.0.pwmgen.00.output-type
    36  float RW             10  hm2_7i97.0.pwmgen.00.scale
    36  bit   RW          FALSE  hm2_7i97.0.pwmgen.01.dither
    36  bit   RW           TRUE  hm2_7i97.0.pwmgen.01.offset-mode
    36  bit   RW          FALSE  hm2_7i97.0.pwmgen.01.out0.invert_output
    36  bit   RW          FALSE  hm2_7i97.0.pwmgen.01.out0.is_opendrain
    36  s32   RW              1  hm2_7i97.0.pwmgen.01.output-type
    36  float RW             10  hm2_7i97.0.pwmgen.01.scale
    36  bit   RW          FALSE  hm2_7i97.0.pwmgen.02.dither
    36  bit   RW           TRUE  hm2_7i97.0.pwmgen.02.offset-mode
    36  bit   RW          FALSE  hm2_7i97.0.pwmgen.02.out0.invert_output
    36  bit   RW          FALSE  hm2_7i97.0.pwmgen.02.out0.is_opendrain
    36  s32   RW              1  hm2_7i97.0.pwmgen.02.output-type
    36  float RW             10  hm2_7i97.0.pwmgen.02.scale
    36  bit   RW          FALSE  hm2_7i97.0.pwmgen.03.dither
    36  bit   RW          FALSE  hm2_7i97.0.pwmgen.03.offset-mode
    36  bit   RW          FALSE  hm2_7i97.0.pwmgen.03.out0.invert_output
    36  bit   RW          FALSE  hm2_7i97.0.pwmgen.03.out0.is_opendrain
    36  s32   RW              1  hm2_7i97.0.pwmgen.03.output-type
    36  float RW              1  hm2_7i97.0.pwmgen.03.scale
    36  bit   RW          FALSE  hm2_7i97.0.pwmgen.04.dither
    36  bit   RW          FALSE  hm2_7i97.0.pwmgen.04.enable.invert_output
    36  bit   RW          FALSE  hm2_7i97.0.pwmgen.04.enable.is_opendrain
    36  bit   RW          FALSE  hm2_7i97.0.pwmgen.04.offset-mode
    36  bit   RW          FALSE  hm2_7i97.0.pwmgen.04.out0.invert_output
    36  bit   RW          FALSE  hm2_7i97.0.pwmgen.04.out0.is_opendrain
    36  s32   RW              1  hm2_7i97.0.pwmgen.04.output-type
    36  float RW              1  hm2_7i97.0.pwmgen.04.scale
    36  bit   RW          FALSE  hm2_7i97.0.pwmgen.05.dither
    36  bit   RW          FALSE  hm2_7i97.0.pwmgen.05.enable.invert_output
    36  bit   RW          FALSE  hm2_7i97.0.pwmgen.05.enable.is_opendrain
    36  bit   RW           TRUE  hm2_7i97.0.pwmgen.05.offset-mode
    36  bit   RW          FALSE  hm2_7i97.0.pwmgen.05.out0.invert_output
    36  bit   RW          FALSE  hm2_7i97.0.pwmgen.05.out0.is_opendrain
    36  s32   RW              1  hm2_7i97.0.pwmgen.05.output-type
    36  float RW           3600  hm2_7i97.0.pwmgen.05.scale
    36  u32   RW     0x00004E20  hm2_7i97.0.pwmgen.pdm_frequency
    36  u32   RW     0x0000BB80  hm2_7i97.0.pwmgen.pwm_frequency
 hm2_7i97.0.pwmgen.00.enable.invert_output        hm2_7i97.0.gpio.008.invert_output
 hm2_7i97.0.pwmgen.00.enable.is_opendrain         hm2_7i97.0.gpio.008.is_opendrain
 hm2_7i97.0.pwmgen.00.out0.invert_output          hm2_7i97.0.gpio.000.invert_output
 hm2_7i97.0.pwmgen.00.out0.is_opendrain           hm2_7i97.0.gpio.000.is_opendrain
 hm2_7i97.0.pwmgen.01.out0.invert_output          hm2_7i97.0.gpio.001.invert_output
 hm2_7i97.0.pwmgen.01.out0.is_opendrain           hm2_7i97.0.gpio.001.is_opendrain
 hm2_7i97.0.pwmgen.02.out0.invert_output          hm2_7i97.0.gpio.002.invert_output
 hm2_7i97.0.pwmgen.02.out0.is_opendrain           hm2_7i97.0.gpio.002.is_opendrain
 hm2_7i97.0.pwmgen.03.out0.invert_output          hm2_7i97.0.gpio.003.invert_output
 hm2_7i97.0.pwmgen.03.out0.is_opendrain           hm2_7i97.0.gpio.003.is_opendrain
 hm2_7i97.0.pwmgen.04.enable.invert_output        hm2_7i97.0.gpio.005.invert_output
 hm2_7i97.0.pwmgen.04.enable.is_opendrain         hm2_7i97.0.gpio.005.is_opendrain
 hm2_7i97.0.pwmgen.04.out0.invert_output          hm2_7i97.0.gpio.004.invert_output
 hm2_7i97.0.pwmgen.04.out0.is_opendrain           hm2_7i97.0.gpio.004.is_opendrain
 hm2_7i97.0.pwmgen.05.enable.invert_output        hm2_7i97.0.gpio.007.invert_output
 hm2_7i97.0.pwmgen.05.enable.is_opendrain         hm2_7i97.0.gpio.007.is_opendrain
 hm2_7i97.0.pwmgen.05.out0.invert_output          hm2_7i97.0.gpio.006.invert_output
 hm2_7i97.0.pwmgen.05.out0.is_opendrain           hm2_7i97.0.gpio.006.is_opendrain