Configuration Name: HOSTMOT2

General configuration information:

  BoardName : MESA7I92
  FPGA Size: 9 KGates
  FPGA Pins: 144
  Number of IO Ports: 2
  Width of one I/O port: 17
  Clock Low frequency: 100.0000 MHz
  Clock High frequency: 200.0000 MHz
  IDROM Type: 3
  Instance Stride 0: 4
  Instance Stride 1: 64
  Register Stride 0: 256
  Register Stride 1: 256

Modules in configuration:

  Module: DPLL
  There are 1 of DPLL in configuration
  Version: 0
  Registers: 7
  BaseAddress: 7000
  ClockFrequency: 100.000 MHz
  Register Stride: 256 bytes
  Instance Stride: 4 bytes

  Module: WatchDog
  There are 1 of WatchDog in configuration
  Version: 0
  Registers: 3
  BaseAddress: 0C00
  ClockFrequency: 100.000 MHz
  Register Stride: 256 bytes
  Instance Stride: 4 bytes

  Module: IOPort
  There are 2 of IOPort in configuration
  Version: 0
  Registers: 5
  BaseAddress: 1000
  ClockFrequency: 100.000 MHz
  Register Stride: 256 bytes
  Instance Stride: 4 bytes

  Module: MuxedQCount
  There are 6 of MuxedQCount in configuration
  Version: 4
  Registers: 5
  BaseAddress: 3600
  ClockFrequency: 100.000 MHz
  Register Stride: 256 bytes
  Instance Stride: 4 bytes

  Module: MuxedQCountSel
  There are 1 of MuxedQCountSel in configuration
  Version: 0
  Registers: 0
  BaseAddress: 0000
  ClockFrequency: 100.000 MHz
  Register Stride: 256 bytes
  Instance Stride: 4 bytes

  Module: SSerial
  There are 1 of SSerial in configuration
  Version: 0
  Registers: 6
  BaseAddress: 5B00
  ClockFrequency: 100.000 MHz
  Register Stride: 256 bytes
  Instance Stride: 64 bytes

  Module: StepGen
  There are 8 of StepGen in configuration
  Version: 2
  Registers: 10
  BaseAddress: 2000
  ClockFrequency: 100.000 MHz
  Register Stride: 256 bytes
  Instance Stride: 4 bytes

  Module: LED
  There are 1 of LED in configuration
  Version: 0
  Registers: 1
  BaseAddress: 0200
  ClockFrequency: 100.000 MHz
  Register Stride: 256 bytes
  Instance Stride: 4 bytes

Configuration pin-out:

IO Connections for P2 -> 7I76
Pin#                  I/O   Pri. func    Sec. func        Chan     Sec. Pin func   Sec. Pin Dir

TB2-4,5                 0   IOPort       StepGen          0        Dir/Table2      (Out)
TB2-2,3                 1   IOPort       StepGen          0        Step/Table1     (Out)
TB2-10,11               2   IOPort       StepGen          1        Dir/Table2      (Out)
TB2-8,9                 3   IOPort       StepGen          1        Step/Table1     (Out)
TB2-16,17               4   IOPort       StepGen          2        Dir/Table2      (Out)
TB2-14,15               5   IOPort       StepGen          2        Step/Table1     (Out)
TB2-22,23               6   IOPort       StepGen          3        Dir/Table2      (Out)
TB2-20,21               7   IOPort       StepGen          3        Step/Table1     (Out)
TB3-4,5                 8   IOPort       StepGen          4        Dir/Table2      (Out)
TB3-2,3                 9   IOPort       StepGen          4        Step/Table1     (Out)
Internal-Field-IO      10   IOPort       SSerial          0        TXData0         (Out)
Internal-Field-IO      11   IOPort       SSerial          0        RXData0         (In)
TB3-18,19              12   IOPort       SSerial          0        TXData1         (Out)
TB3-16,17              13   IOPort       SSerial          0        RXData1         (In)
TB3-13,14              14   IOPort       MuxedQCount      2        MuxQ-IDX        (In)
TB3-10,11              15   IOPort       MuxedQCount      2        MuxQ-B          (In)
TB3-7,8                16   IOPort       MuxedQCount      2        MuxQ-A          (In)

IO Connections for P1 -> 7I85S
Pin#                  I/O   Pri. func    Sec. func        Chan     Sec. Pin func   Sec. Pin Dir

TB1-19,20              17   IOPort       SSerial          0        RXData2         (In)
TB1-21,22              18   IOPort       SSerial          0        TXData2         (Out)
TB1-11,12              19   IOPort       None           
TB1-13,14              20   IOPort       None           
TB1-3,4                21   IOPort       StepGen          7        Step/Table1     (Out)
TB1-5,6                22   IOPort       StepGen          7        Dir/Table2      (Out)
TB2-19,20              23   IOPort       StepGen          6        Step/Table1     (Out)
TB2-21,22              24   IOPort       StepGen          6        Dir/Table2      (Out)
TB2-11,12              25   IOPort       StepGen          5        Step/Table1     (Out)
TB2-13,14              26   IOPort       StepGen          5        Dir/Table2      (Out)
Internal-EncMux        27   IOPort       MuxedQCountSel   0        MuxSel0         (Out)
TB3-1,2,9,10           28   IOPort       MuxedQCount      0        MuxQ-A          (In)
TB3-4,5,12,13          29   IOPort       MuxedQCount      0        MuxQ-B          (In)
TB3-7,8,12,13          30   IOPort       MuxedQCount      0        MuxQ-IDX        (In)
TB3-17,18,TB2-1,2      31   IOPort       MuxedQCount      1        MuxQ-A          (In)
TB3-20,21,TB2-4,5      32   IOPort       MuxedQCount      1        MuxQ-B          (In)
TB3-23,24,TB2-7,8      33   IOPort       MuxedQCount      1        MuxQ-IDX        (In)