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superfluous parameter mystery

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9 years 7 months ago - 9 years 7 months ago #90679 by jCandlish
superfluous parameter mystery was created by jCandlish
I don't see what is causing an extra enable node for the first pwmgen???

hm2_7i80.0.pwmgen.00.0.enable.invert_output
hm2_7i80.0.pwmgen.00.0.enable.is_opendrain
hm2_7i80.0.pwmgen.00.1.enable.invert_output
hm2_7i80.0.pwmgen.00.1.enable.is_opendrain


Code:
latheoperator@125cnc:~/linuxcnc$ halrun halcmd: loadrt hostmot2 Note: Using POSIX realtime hm2: loading Mesa HostMot2 driver version 0.15 halcmd: loadrt hm2_eth board_ip="10.100.10.100" config="firmware=hm2/7i80hd16/5xST_3xENC_2xSS_6xSV.BIT num_encoders=12 num_pwmgens=6 num_stepgens=0 sserial_port_0=00000000" hm2_eth: loading Mesa AnyIO HostMot2 ethernet driver version 0.2 hm2_eth: 10.100.10.100: Hardware address: 00:60:1b:11:00:92 hm2_eth: discovered 7I80HD-16 hm2/hm2_7i80.0: Smart Serial Firmware Version 43 Board hm2_7i80.0.7i84.0.0 Hardware Mode 0 = standard Board hm2_7i80.0.7i84.0.0 Software Mode 0 = input_output Board hm2_7i80.0.7i84.0.0 Software Mode 1 = io_analog_fieldvoltage Board hm2_7i80.0.7i84.0.0 Software Mode 2 = io_encoder_analog Board hm2_7i80.0.7i73.0.1 Hardware Mode 0 = nokeyboardnodisplay Board hm2_7i80.0.7i73.0.1 Software Mode 0 = inputoutputencoder Board hm2_7i80.0.7i73.0.1 Software Mode 1 = inputoutputencoderanalog Board hm2_7i80.0.7i73.0.1 Software Mode 2 = inputoutputencoderanalog Board hm2_7i80.0.7i73.0.1 Hardware Mode 1 = nokeyboarddisplay Board hm2_7i80.0.7i73.0.1 Software Mode 0 = inputoutputencoderdisplay Board hm2_7i80.0.7i73.0.1 Software Mode 1 = inputoutputencoderanalogdisplay Board hm2_7i80.0.7i73.0.1 Software Mode 2 = inputoutputencoderanalogwidedisplay Board hm2_7i80.0.7i73.0.1 Hardware Mode 2 = keyboard4by8nodisplay Board hm2_7i80.0.7i73.0.1 Software Mode 0 = inputoutputencoderkeycode4by8 Board hm2_7i80.0.7i73.0.1 Software Mode 1 = inputoutputencoderanalogkeycode4by8 Board hm2_7i80.0.7i73.0.1 Software Mode 2 = inputoutputencoderanalogkeycode4by8 Board hm2_7i80.0.7i73.0.1 Hardware Mode 3 = keyboard4by8display Board hm2_7i80.0.7i73.0.1 Software Mode 0 = inputoutputencoderdisplaykeycode4by8 Board hm2_7i80.0.7i73.0.1 Software Mode 1 = inputoutputencoderanalogdisplaykeycode4by8 Board hm2_7i80.0.7i73.0.1 Software Mode 2 = inputoutputencoderanalogwidedisplaykeycode4by8 Board hm2_7i80.0.7i73.0.1 Hardware Mode 4 = keyboard8by8nodisplay Board hm2_7i80.0.7i73.0.1 Software Mode 0 = inputoutputencoderkeycode8by8 Board hm2_7i80.0.7i73.0.1 Software Mode 1 = inputoutputencoderanalogkeycode8by8 Board hm2_7i80.0.7i73.0.1 Software Mode 2 = inputoutputencoderanalogkeycode8by8 Board hm2_7i80.0.7i73.0.1 Hardware Mode 5 = keyboard8by8display Board hm2_7i80.0.7i73.0.1 Software Mode 0 = inputoutputencoderdisplaykeycode8by8 Board hm2_7i80.0.7i73.0.1 Software Mode 1 = inputoutputencoderanalogdisplaykeycode8by8 Board hm2_7i80.0.7i73.0.1 Software Mode 2 = inputoutputencoderanalogwidedisplaykeycode8by8 hm2/hm2_7i80.0: 72 I/O Pins used: hm2/hm2_7i80.0: IO Pin 000 (P1-01): PWMGen #0, pin Not-Enable (Output) hm2/hm2_7i80.0: IO Pin 001 (P1-03): Muxed Encoder #0, pin Muxed A (Input) hm2/hm2_7i80.0: IO Pin 002 (P1-05): Muxed Encoder #0, pin Muxed B (Input) hm2/hm2_7i80.0: IO Pin 003 (P1-07): Muxed Encoder #0, pin Muxed Index (Input) hm2/hm2_7i80.0: IO Pin 004 (P1-09): Muxed Encoder #1, pin Muxed A (Input) hm2/hm2_7i80.0: IO Pin 005 (P1-11): Muxed Encoder #1, pin Muxed B (Input) hm2/hm2_7i80.0: IO Pin 006 (P1-13): Muxed Encoder #1, pin Muxed Index (Input) hm2/hm2_7i80.0: IO Pin 007 (P1-15): Muxed Encoder #2, pin Muxed A (Input) hm2/hm2_7i80.0: IO Pin 008 (P1-17): Muxed Encoder #2, pin Muxed B (Input) hm2/hm2_7i80.0: IO Pin 009 (P1-19): Muxed Encoder #2, pin Muxed Index (Input) hm2/hm2_7i80.0: IO Pin 010 (P1-21): Muxed Encoder Select #0, pin Mux Select 0 (Output) hm2/hm2_7i80.0: IO Pin 011 (P1-23): PWMGen #0, pin Out0 (PWM or Up) (Output) hm2/hm2_7i80.0: IO Pin 012 (P1-25): PWMGen #0, pin Out1 (Dir or Down) (Output) hm2/hm2_7i80.0: IO Pin 013 (P1-27): PWMGen #1, pin Out0 (PWM or Up) (Output) hm2/hm2_7i80.0: IO Pin 014 (P1-29): PWMGen #1, pin Out1 (Dir or Down) (Output) hm2/hm2_7i80.0: IO Pin 015 (P1-31): PWMGen #2, pin Out0 (PWM or Up) (Output) hm2/hm2_7i80.0: IO Pin 016 (P1-33): PWMGen #2, pin Out1 (Dir or Down) (Output) hm2/hm2_7i80.0: IO Pin 017 (P1-35): PWMGen #3, pin Out0 (PWM or Up) (Output) hm2/hm2_7i80.0: IO Pin 018 (P1-37): PWMGen #3, pin Out1 (Dir or Down) (Output) hm2/hm2_7i80.0: IO Pin 019 (P1-39): PWMGen #4, pin Out0 (PWM or Up) (Output) hm2/hm2_7i80.0: IO Pin 020 (P1-41): PWMGen #4, pin Out1 (Dir or Down) (Output) hm2/hm2_7i80.0: IO Pin 021 (P1-43): PWMGen #5, pin Out0 (PWM or Up) (Output) hm2/hm2_7i80.0: IO Pin 022 (P1-45): PWMGen #5, pin Out1 (Dir or Down) (Output) hm2/hm2_7i80.0: IO Pin 023 (P1-47): PWMGen #0, pin Not-Enable (Output) hm2/hm2_7i80.0: IO Pin 024 (P2-01): IOPort hm2/hm2_7i80.0: IO Pin 025 (P2-03): IOPort hm2/hm2_7i80.0: IO Pin 026 (P2-05): IOPort hm2/hm2_7i80.0: IO Pin 027 (P2-07): IOPort hm2/hm2_7i80.0: IO Pin 028 (P2-09): Smart Serial Interface #0, pin RxData0 (Input) hm2/hm2_7i80.0: IO Pin 029 (P2-11): Muxed Encoder #4, pin Muxed A (Input) hm2/hm2_7i80.0: IO Pin 030 (P2-13): Smart Serial Interface #0, pin RxData1 (Input) hm2/hm2_7i80.0: IO Pin 031 (P2-15): Muxed Encoder #4, pin Muxed B (Input) hm2/hm2_7i80.0: IO Pin 032 (P2-17): IOPort hm2/hm2_7i80.0: IO Pin 033 (P2-19): Muxed Encoder #4, pin Muxed Index (Input) hm2/hm2_7i80.0: IO Pin 034 (P2-21): Muxed Encoder #3, pin Muxed A (Input) hm2/hm2_7i80.0: IO Pin 035 (P2-23): Muxed Encoder #5, pin Muxed A (Input) hm2/hm2_7i80.0: IO Pin 036 (P2-25): Muxed Encoder #3, pin Muxed B (Input) hm2/hm2_7i80.0: IO Pin 037 (P2-27): Muxed Encoder #5, pin Muxed B (Input) hm2/hm2_7i80.0: IO Pin 038 (P2-29): Muxed Encoder #3, pin Muxed Index (Input) hm2/hm2_7i80.0: IO Pin 039 (P2-31): Muxed Encoder #5, pin Muxed Index (Input) hm2/hm2_7i80.0: IO Pin 040 (P2-33): IOPort hm2/hm2_7i80.0: IO Pin 041 (P2-35): IOPort hm2/hm2_7i80.0: IO Pin 042 (P2-37): IOPort hm2/hm2_7i80.0: IO Pin 043 (P2-39): IOPort hm2/hm2_7i80.0: IO Pin 044 (P2-41): Smart Serial Interface #0, pin TxData0 (Output) hm2/hm2_7i80.0: IO Pin 045 (P2-43): Smart Serial Interface #0, pin TxData1 (Output) hm2/hm2_7i80.0: IO Pin 046 (P2-45): IOPort hm2/hm2_7i80.0: IO Pin 047 (P2-47): IOPort hm2/hm2_7i80.0: IO Pin 048 (P3-01): IOPort hm2/hm2_7i80.0: IO Pin 049 (P3-03): IOPort hm2/hm2_7i80.0: IO Pin 050 (P3-05): IOPort hm2/hm2_7i80.0: IO Pin 051 (P3-07): IOPort hm2/hm2_7i80.0: IO Pin 052 (P3-09): IOPort hm2/hm2_7i80.0: IO Pin 053 (P3-11): IOPort hm2/hm2_7i80.0: IO Pin 054 (P3-13): IOPort hm2/hm2_7i80.0: IO Pin 055 (P3-15): IOPort hm2/hm2_7i80.0: IO Pin 056 (P3-17): IOPort hm2/hm2_7i80.0: IO Pin 057 (P3-19): IOPort hm2/hm2_7i80.0: IO Pin 058 (P3-21): IOPort hm2/hm2_7i80.0: IO Pin 059 (P3-23): IOPort hm2/hm2_7i80.0: IO Pin 060 (P3-25): IOPort hm2/hm2_7i80.0: IO Pin 061 (P3-27): IOPort hm2/hm2_7i80.0: IO Pin 062 (P3-29): IOPort hm2/hm2_7i80.0: IO Pin 063 (P3-31): IOPort hm2/hm2_7i80.0: IO Pin 064 (P3-33): IOPort hm2/hm2_7i80.0: IO Pin 065 (P3-35): IOPort hm2/hm2_7i80.0: IO Pin 066 (P3-37): IOPort hm2/hm2_7i80.0: IO Pin 067 (P3-39): IOPort hm2/hm2_7i80.0: IO Pin 068 (P3-41): IOPort hm2/hm2_7i80.0: IO Pin 069 (P3-43): IOPort hm2/hm2_7i80.0: IO Pin 070 (P3-45): IOPort hm2/hm2_7i80.0: IO Pin 071 (P3-47): IOPort hm2/hm2_7i80.0: registered halcmd: show param hm2_7i80.0.pwmgen Parameters: Owner Type Dir Value Name 7 bit RW FALSE hm2_7i80.0.pwmgen.00.0.enable.invert_output 7 bit RW FALSE hm2_7i80.0.pwmgen.00.0.enable.is_opendrain 7 bit RW FALSE hm2_7i80.0.pwmgen.00.1.enable.invert_output 7 bit RW FALSE hm2_7i80.0.pwmgen.00.1.enable.is_opendrain 7 bit RW FALSE hm2_7i80.0.pwmgen.00.out0.invert_output 7 bit RW FALSE hm2_7i80.0.pwmgen.00.out0.is_opendrain 7 bit RW FALSE hm2_7i80.0.pwmgen.00.out1.invert_output 7 bit RW FALSE hm2_7i80.0.pwmgen.00.out1.is_opendrain 7 s32 RW 1 hm2_7i80.0.pwmgen.00.output-type 7 float RW 1 hm2_7i80.0.pwmgen.00.scale 7 bit RW FALSE hm2_7i80.0.pwmgen.01.out0.invert_output 7 bit RW FALSE hm2_7i80.0.pwmgen.01.out0.is_opendrain 7 bit RW FALSE hm2_7i80.0.pwmgen.01.out1.invert_output 7 bit RW FALSE hm2_7i80.0.pwmgen.01.out1.is_opendrain 7 s32 RW 1 hm2_7i80.0.pwmgen.01.output-type 7 float RW 1 hm2_7i80.0.pwmgen.01.scale 7 bit RW FALSE hm2_7i80.0.pwmgen.02.out0.invert_output 7 bit RW FALSE hm2_7i80.0.pwmgen.02.out0.is_opendrain 7 bit RW FALSE hm2_7i80.0.pwmgen.02.out1.invert_output 7 bit RW FALSE hm2_7i80.0.pwmgen.02.out1.is_opendrain 7 s32 RW 1 hm2_7i80.0.pwmgen.02.output-type 7 float RW 1 hm2_7i80.0.pwmgen.02.scale 7 bit RW FALSE hm2_7i80.0.pwmgen.03.out0.invert_output 7 bit RW FALSE hm2_7i80.0.pwmgen.03.out0.is_opendrain 7 bit RW FALSE hm2_7i80.0.pwmgen.03.out1.invert_output 7 bit RW FALSE hm2_7i80.0.pwmgen.03.out1.is_opendrain 7 s32 RW 1 hm2_7i80.0.pwmgen.03.output-type 7 float RW 1 hm2_7i80.0.pwmgen.03.scale 7 bit RW FALSE hm2_7i80.0.pwmgen.04.out0.invert_output 7 bit RW FALSE hm2_7i80.0.pwmgen.04.out0.is_opendrain 7 bit RW FALSE hm2_7i80.0.pwmgen.04.out1.invert_output 7 bit RW FALSE hm2_7i80.0.pwmgen.04.out1.is_opendrain 7 s32 RW 1 hm2_7i80.0.pwmgen.04.output-type 7 float RW 1 hm2_7i80.0.pwmgen.04.scale 7 bit RW FALSE hm2_7i80.0.pwmgen.05.out0.invert_output 7 bit RW FALSE hm2_7i80.0.pwmgen.05.out0.is_opendrain 7 bit RW FALSE hm2_7i80.0.pwmgen.05.out1.invert_output 7 bit RW FALSE hm2_7i80.0.pwmgen.05.out1.is_opendrain 7 s32 RW 1 hm2_7i80.0.pwmgen.05.output-type 7 float RW 1 hm2_7i80.0.pwmgen.05.scale 7 u32 RW 0x00004E20 hm2_7i80.0.pwmgen.pdm_frequency 7 u32 RW 0x00004E20 hm2_7i80.0.pwmgen.pwm_frequency halcmd:

Maybe the .vhd makes a bad bit-file?
Last edit: 9 years 7 months ago by jCandlish.

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9 years 7 months ago - 9 years 7 months ago #90691 by PCW
Replied by PCW on topic superfluous parameter mystery
It looks correct to me
(its a little odd because the pinout uses 2 enable pins for PWMGEN0 so there needs to be two sets of GPIO modification parameters available)
Last edit: 9 years 7 months ago by PCW.

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9 years 7 months ago #90692 by jCandlish
Replied by jCandlish on topic superfluous parameter mystery
Thanks. I figured out the enable pins after I posted that. It indeed does look odd the first time one sees it.

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9 years 7 months ago #90696 by PCW
Replied by PCW on topic superfluous parameter mystery
The oddness is really only when you add the GPIO aliases (master only now)
if you just saw the GPIO000 and GPIO023 setup parameters there would be nothing strange
but its definitely nicer to

setp hm2_7i80.0.pwmgen.00.out0.invert_output true

than

setp hm2_7i80.0.gpio.011.out0.invert_output true

even though they do the same thing

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9 years 6 months ago - 9 years 6 months ago #90787 by jCandlish
Replied by jCandlish on topic superfluous parameter mystery

PCW wrote: setp setp hm2_7i80.0.pwmgen.00.out0.invert_output true


Except the parameter is named hm2_7i80.0.pwmgen.00.0.enable.invert_output
Last edit: 9 years 6 months ago by jCandlish.

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9 years 6 months ago #90797 by PCW
Replied by PCW on topic superfluous parameter mystery
In your case (2 pwm enable 0 pins) yes, you have the additional enumeration required
to access the aliased pins, in the general case, my name is correct

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