xilinx ise

Basically to make a new configuration for a already existing card, you make a new pinout file
The pinout file determines which modules are built and how they are connected to the physical FPGA pins

If you dont want to install webpack I can build a bit file for you but you would have to supply a pinout file that has your desired pinout (plus I need the target card/FPGA size)

Pinout files all start with PIN and end with NNN.vhd when NNN is the number of GPIO pins of the particular card:

34 = 5I25,6I25,7I92
42 = 4I74
48 = 7I43,7I93
51 = 7I76E,7I96,7I97
68 = 7I80DB
72 = 5I20,5I22,5I23,5I24,6I24,7I80HD,7I90
96 = 5I22
144 = 3X20

thanks Peter,
my card is 7i80DB-16, since the 7i40 have the db connector I have to redo the right connections but it's not a problem for me.
for example J2- 7i40 J3 -- 7i40 J4 -- gpio J5 -- gpio



maybe even if it supports a stepgen in one port
this is what I need.
Thanks again
Mauro

I basically need the svst8_4 pin for 7i80db 68 pin not 72. but it is not found .. if someone has already done it simplifies my life
thank you
Mauro
ps
Peter are in your hands

I finally managed to change the pins !!!
maybe I will not have done in the best way but it works!