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07 Oct 2011 10:22 #13738 by kostas
Replied by kostas on topic Re:Threads
Maybe you could use a oneshot component before the enable pin, for generating the one clock pulse needed?

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07 Oct 2011 10:31 #13739 by fma
Replied by fma on topic Re:Threads
The problem is to generate the trigger signal...

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07 Oct 2011 10:57 #13741 by fma
Replied by fma on topic Re:Threads
Ok, I found: siggen!

Question: in the oneshot comp, does width=0 mean the minimum duration of the out signal?

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07 Oct 2011 13:29 #13751 by andypugh
Replied by andypugh on topic Re:Threads
Yes, 0 = one thread invocation.

I am surprised that sampler doesn't feature a divider parameter. I think that somebody should add one.

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07 Oct 2011 17:24 #13764 by fma
Replied by fma on topic Re:Threads
I'll have a look at that comp, and see if I can add this feature...

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14 Oct 2011 07:12 #13906 by fma
Replied by fma on topic Re:Threads
I finally wrote a clock comp, which has both normal 50% duty cycle output pin and pulse output pin. The pulse pin remains TRUE only for 1 thread cycle. Connecting this pulse output to the sampler.enable pin does the job.

Here is the code; feel free to comment it:
component clock "Generate a clock signal";

pin in bit enable=TRUE "enable clock";
pin out bit out=FALSE "50% duty cycle clock output";
pin out bit pulse=FALSE "pulse clock output";
param rw unsigned freq=1000 "clock frequency";

function _ nofp;

// Global Variables
variable unsigned total_nsec = 0;

license "GPL";
author "fma";

;;

FUNCTION(_)
{
    if (enable) {
        if (total_nsec == 0) {
            out = TRUE;
            pulse = TRUE;
        }
        else {
            pulse = FALSE;
            if (total_nsec >= (1000000000 / freq / 2)) {
                out = FALSE;
            }
        }

        total_nsec += period;
        if (total_nsec >= (1000000000 / freq)) {
            total_nsec = 0;
        }
    }
}

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17 Oct 2011 08:01 - 17 Oct 2011 08:09 #13966 by fma
Replied by fma on topic Re:Threads
Oups, there is an issue in the previous code: I inverted the frequency computation...

Anyway, here is a new version, using fp, allowing freq. < 1:
component clock "Generate a clock signal";

pin in bit enable=TRUE "enable clock";
pin out bit out=FALSE "50% duty cycle clock output";
pin out bit pulse=FALSE "pulse clock output";
param rw float freq=1000 "clock frequency";

function _ fp;

// Global variables
variable double total_sec = 0.;

license "GPL";
author "fma";

;;

FUNCTION(_)
{
    if (enable) {
        if (total_sec == 0.) {
            out = TRUE;
            pulse = TRUE;
        }
        else {
            pulse = FALSE;
            if (total_sec >= (2. / freq)) {
                out = FALSE;
            }
        }

        total_sec += fperiod;
        if (total_sec >= (1. / freq)) {
            total_sec = 0.;
        }
    }
}
Last edit: 17 Oct 2011 08:09 by fma. Reason: Changed total_sec from float to double

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