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MESA 7i93 PWM question - motor rotation direction switch
- pingtomi
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08 Jun 2025 19:51 #329966
by pingtomi
MESA 7i93 PWM question - motor rotation direction switch was created by pingtomi
Dear All,
I try to set up 7i93 PWM control for my ATC motor and I struggle with its rotation direction change, meaning:
- if pwmgen.0.value = positive number, pwm signal is on PIN6 as expected, motor rotates clockwise.
- if pwmgen.0.value = negative number, there is no PWM signal on PIN8, motor does not rotate at all.
I use PWM controlled mosfet bridge which expects CW and CCW input PWM signals on TTL level.
Regardless of pwmgen.output-type it does not work, but based on hostmot2 manual in my understanding it should work with output-type 2.
7i93's firmware is standard.
What do I wrong, or how can I change the rotation direction with PWM if my motor drive expects CW and CCW PWM signals?
thank you for your help.
Regards,
Tamas
I try to set up 7i93 PWM control for my ATC motor and I struggle with its rotation direction change, meaning:
- if pwmgen.0.value = positive number, pwm signal is on PIN6 as expected, motor rotates clockwise.
- if pwmgen.0.value = negative number, there is no PWM signal on PIN8, motor does not rotate at all.
I use PWM controlled mosfet bridge which expects CW and CCW input PWM signals on TTL level.
Regardless of pwmgen.output-type it does not work, but based on hostmot2 manual in my understanding it should work with output-type 2.
7i93's firmware is standard.
What do I wrong, or how can I change the rotation direction with PWM if my motor drive expects CW and CCW PWM signals?
thank you for your help.
Regards,
Tamas
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08 Jun 2025 23:01 #329980
by PCW
Replied by PCW on topic MESA 7i93 PWM question - motor rotation direction switch
What does:
mesaflash --device ethernet --addr [card_ip_address] --readhmid
report?
mesaflash --device ethernet --addr [card_ip_address] --readhmid
report?
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09 Jun 2025 08:43 - 09 Jun 2025 08:43 #330001
by pingtomi
Replied by pingtomi on topic MESA 7i93 PWM question - motor rotation direction switch
Configuration Name: HOSTMOT2
General configuration information:
BoardName : MESA7I93
FPGA Size: 9 KGates
FPGA Pins: 144
Number of IO Ports: 2
Width of one I/O port: 24
Clock Low frequency: 100.0000 MHz
Clock High frequency: 200.0000 MHz
IDROM Type: 3
Instance Stride 0: 4
Instance Stride 1: 64
Register Stride 0: 256
Register Stride 1: 256
Modules in configuration:
Module: DPLL
There are 1 of DPLL in configuration
Version: 0
Registers: 7
BaseAddress: 7000
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Module: WatchDog
There are 1 of WatchDog in configuration
Version: 0
Registers: 3
BaseAddress: 0C00
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Module: IOPort
There are 2 of IOPort in configuration
Version: 0
Registers: 5
BaseAddress: 1000
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Module: QCount
There are 4 of QCount in configuration
Version: 2
Registers: 5
BaseAddress: 3000
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Module: PWM
There are 4 of PWM in configuration
Version: 0
Registers: 5
BaseAddress: 4100
ClockFrequency: 200.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Module: StepGen
There are 4 of StepGen in configuration
Version: 2
Registers: 10
BaseAddress: 2000
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Module: LED
There are 1 of LED in configuration
Version: 0
Registers: 1
BaseAddress: 0200
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Configuration pin-out:
IO Connections for P2
Pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
1 0 IOPort QCount 1 Quad-B (In)
3 1 IOPort QCount 1 Quad-A (In)
5 2 IOPort QCount 0 Quad-B (In)
7 3 IOPort QCount 0 Quad-A (In)
9 4 IOPort QCount 1 Quad-IDX (In)
11 5 IOPort QCount 0 Quad-IDX (In)
13 6 IOPort PWM 1 PWM (Out)
15 7 IOPort PWM 0 PWM (Out)
17 8 IOPort PWM 1 Dir (Out)
19 9 IOPort PWM 0 Dir (Out)
21 10 IOPort PWM 1 /Enable (Out)
23 11 IOPort PWM 0 /Enable (Out)
25 12 IOPort QCount 3 Quad-B (In)
27 13 IOPort QCount 3 Quad-A (In)
29 14 IOPort QCount 2 Quad-B (In)
31 15 IOPort QCount 2 Quad-A (In)
33 16 IOPort QCount 3 Quad-IDX (In)
35 17 IOPort QCount 2 Quad-IDX (In)
37 18 IOPort PWM 3 PWM (Out)
39 19 IOPort PWM 2 PWM (Out)
41 20 IOPort PWM 3 Dir (Out)
43 21 IOPort PWM 2 Dir (Out)
45 22 IOPort PWM 3 /Enable (Out)
47 23 IOPort PWM 2 /Enable (Out)
IO Connections for P1
Pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
1 24 IOPort StepGen 0 Step/Table1 (Out)
3 25 IOPort StepGen 0 Dir/Table2 (Out)
5 26 IOPort StepGen 0 Table3 (Out)
7 27 IOPort StepGen 0 Table4 (Out)
9 28 IOPort StepGen 0 Table5 (Out)
11 29 IOPort StepGen 0 Table6 (Out)
13 30 IOPort StepGen 1 Step/Table1 (Out)
15 31 IOPort StepGen 1 Dir/Table2 (Out)
17 32 IOPort StepGen 1 Table3 (Out)
19 33 IOPort StepGen 1 Table4 (Out)
21 34 IOPort StepGen 1 Table5 (Out)
23 35 IOPort StepGen 1 Table6 (Out)
25 36 IOPort StepGen 2 Step/Table1 (Out)
27 37 IOPort StepGen 2 Dir/Table2 (Out)
29 38 IOPort StepGen 2 Table3 (Out)
31 39 IOPort StepGen 2 Table4 (Out)
33 40 IOPort StepGen 2 Table5 (Out)
35 41 IOPort StepGen 2 Table6 (Out)
37 42 IOPort StepGen 3 Step/Table1 (Out)
39 43 IOPort StepGen 3 Dir/Table2 (Out)
41 44 IOPort StepGen 3 Table3 (Out)
43 45 IOPort StepGen 3 Table4 (Out)
45 46 IOPort StepGen 3 Table5 (Out)
47 47 IOPort StepGen 3 Table6 (Out)
General configuration information:
BoardName : MESA7I93
FPGA Size: 9 KGates
FPGA Pins: 144
Number of IO Ports: 2
Width of one I/O port: 24
Clock Low frequency: 100.0000 MHz
Clock High frequency: 200.0000 MHz
IDROM Type: 3
Instance Stride 0: 4
Instance Stride 1: 64
Register Stride 0: 256
Register Stride 1: 256
Modules in configuration:
Module: DPLL
There are 1 of DPLL in configuration
Version: 0
Registers: 7
BaseAddress: 7000
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Module: WatchDog
There are 1 of WatchDog in configuration
Version: 0
Registers: 3
BaseAddress: 0C00
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Module: IOPort
There are 2 of IOPort in configuration
Version: 0
Registers: 5
BaseAddress: 1000
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Module: QCount
There are 4 of QCount in configuration
Version: 2
Registers: 5
BaseAddress: 3000
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Module: PWM
There are 4 of PWM in configuration
Version: 0
Registers: 5
BaseAddress: 4100
ClockFrequency: 200.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Module: StepGen
There are 4 of StepGen in configuration
Version: 2
Registers: 10
BaseAddress: 2000
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Module: LED
There are 1 of LED in configuration
Version: 0
Registers: 1
BaseAddress: 0200
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Configuration pin-out:
IO Connections for P2
Pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
1 0 IOPort QCount 1 Quad-B (In)
3 1 IOPort QCount 1 Quad-A (In)
5 2 IOPort QCount 0 Quad-B (In)
7 3 IOPort QCount 0 Quad-A (In)
9 4 IOPort QCount 1 Quad-IDX (In)
11 5 IOPort QCount 0 Quad-IDX (In)
13 6 IOPort PWM 1 PWM (Out)
15 7 IOPort PWM 0 PWM (Out)
17 8 IOPort PWM 1 Dir (Out)
19 9 IOPort PWM 0 Dir (Out)
21 10 IOPort PWM 1 /Enable (Out)
23 11 IOPort PWM 0 /Enable (Out)
25 12 IOPort QCount 3 Quad-B (In)
27 13 IOPort QCount 3 Quad-A (In)
29 14 IOPort QCount 2 Quad-B (In)
31 15 IOPort QCount 2 Quad-A (In)
33 16 IOPort QCount 3 Quad-IDX (In)
35 17 IOPort QCount 2 Quad-IDX (In)
37 18 IOPort PWM 3 PWM (Out)
39 19 IOPort PWM 2 PWM (Out)
41 20 IOPort PWM 3 Dir (Out)
43 21 IOPort PWM 2 Dir (Out)
45 22 IOPort PWM 3 /Enable (Out)
47 23 IOPort PWM 2 /Enable (Out)
IO Connections for P1
Pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
1 24 IOPort StepGen 0 Step/Table1 (Out)
3 25 IOPort StepGen 0 Dir/Table2 (Out)
5 26 IOPort StepGen 0 Table3 (Out)
7 27 IOPort StepGen 0 Table4 (Out)
9 28 IOPort StepGen 0 Table5 (Out)
11 29 IOPort StepGen 0 Table6 (Out)
13 30 IOPort StepGen 1 Step/Table1 (Out)
15 31 IOPort StepGen 1 Dir/Table2 (Out)
17 32 IOPort StepGen 1 Table3 (Out)
19 33 IOPort StepGen 1 Table4 (Out)
21 34 IOPort StepGen 1 Table5 (Out)
23 35 IOPort StepGen 1 Table6 (Out)
25 36 IOPort StepGen 2 Step/Table1 (Out)
27 37 IOPort StepGen 2 Dir/Table2 (Out)
29 38 IOPort StepGen 2 Table3 (Out)
31 39 IOPort StepGen 2 Table4 (Out)
33 40 IOPort StepGen 2 Table5 (Out)
35 41 IOPort StepGen 2 Table6 (Out)
37 42 IOPort StepGen 3 Step/Table1 (Out)
39 43 IOPort StepGen 3 Dir/Table2 (Out)
41 44 IOPort StepGen 3 Table3 (Out)
43 45 IOPort StepGen 3 Table4 (Out)
45 46 IOPort StepGen 3 Table5 (Out)
47 47 IOPort StepGen 3 Table6 (Out)
Last edit: 09 Jun 2025 08:43 by pingtomi.
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09 Jun 2025 13:29 #330017
by PCW
Replied by PCW on topic MESA 7i93 PWM question - motor rotation direction switch
Are you sure you have the pinout correct?
PWM 0 uses 50 pin connector pins 15,19,23
PWM 0 uses 50 pin connector pins 15,19,23
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- pingtomi
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09 Jun 2025 13:46 #330019
by pingtomi
Replied by pingtomi on topic MESA 7i93 PWM question - motor rotation direction switch
yes, I meant pin numbers as they are shown in the I/O column, but you are right I had a mistake as I tried to configure pwm1, but I experienced the same behavior with pwm0 on i/o pins 7 and 9.
if I use multimeter I see between 2,5..4V signal on pin6 (depends on the value, of course) but nothing on pin8. (corresponding 50pin numbers are 13,17)
/enable signals work properly.
thx
if I use multimeter I see between 2,5..4V signal on pin6 (depends on the value, of course) but nothing on pin8. (corresponding 50pin numbers are 13,17)
/enable signals work properly.
thx
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09 Jun 2025 16:32 - 09 Jun 2025 16:35 #330029
by PCW
Replied by PCW on topic MESA 7i93 PWM question - motor rotation direction switch
Does DIR change in output type 0?
(maybe there's a hardware issue)
(maybe there's a hardware issue)
Last edit: 09 Jun 2025 16:35 by PCW.
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