i should have asked whats ins and outs of ladder

The .pin file that matches your .bit file that you have selected will have the FPGA pinout of that bitfile

For 7I37TAs its important to understand that the first 16 GPIO bits on each of the flat cable connectors are inputs and the last 8 GPIO bits are outputs. So for example if you have 2 7I37TAs, one on the 5I20s P3 (GPIO bits 24..47) and the other on the 5I20s P4 (GPIO bits 48..71), you will have outputs on GPIO bits 40..47 (on P3) and outputs on GPIO bits 64..71. Each of these groups of output pins will need to have their is-output attribute set (and probably output-invert as well)

all hail big john now i can take over the world well at least my garage lol. thanx again by the way my name is denny you guys sorry in my thirst for knowledge i forgot the formalities.