I managed to implement the read function as well, using separate functions for read and write. Took some iterations, but with the version I have now, no more hangups of the board, even using a WiFi router to control it.
Now working on a watchdog. This one consist of two sections:
- on the card, which have to be petted (during write) before time out happens (5 ms default, param exported to change this). Will put all outputs to zero, because the board does not support three-state controlled by the FPGA. When the watchdog is happy, one or more (configurable up to your liking) will be HIGH, when the watchdog bites, this pin will be Low. This gives a way to disable drives physically.
- the driver also watches for dropped packets during read. Dropped packets adds to a counter, when the counter is to high (5 subsequent missed packets), the axe falls and communication is stopped. This means that the watchdog on the card will trigger 5 ms later as petting has stopped. The counter of missed packets is decreased every time a packet has successfully been sent.
Will keep you updated when this has been pushed to the repo (at this moment only driver side has been done).
Edit: Watchdog is done and reading data implemented (although packet collisions can occur).