mesa 7i33 7i37

Originally all 50 pin FPGA cards were made to be pinout/functionally compatible with OPTO22
relay modules. These are all active low. Some 50 pin cards have plug-in pullup resistors that
you can reverse to change from pullups to pulldowns.

Its also a side effect of Xilinx FPGA characteristics where you can define pre-configuration
pullups but not pre-configuration pulldowns.
 

7i80hd pullups are removable can remove them to do outputs active high ?
What about internal pullups must disable them also ?

You can remove the resistor networks and install them in backwards
to have pulldowns rather than pullups. I would not simply remove them.

If you do this you should also disable pre-config pullups (W3 down)

Note that you should not do this for Mesa daughtercards that are active low

base pin1 is 5v and base pin10 is gnd
if connect resistor in reverse 5v will connected to port pins through last resistor.
Is it better to cut pin10 of resistor network ?

No, just reverse to get pulldowns vs pullups.
You can cut pin 10 but it does nothing but waste a few mW.

7i80hdt that is not xilinx fpga has the pullup only limitation
or can configured both pullup and pulldown with weak internal resistors ?

Pullups and pulldowns are possible on both but only after configuration

Xilinx chips have the added option of pullups before being configured
 

What do you mean after configuration?
After loading firmware from flash memory?
When you powering fpga the firmware loads almost immediately...
How to enable xilinx weak internal pulldowns?

On Xilinx you can edit the .ucf file and add the "PULLDOWN" constraint 
but the I/O pins will float during powerup/configuration.

For 50 pin cards, it's much easier to just reverse the pullup resistors
and the GPIO will be guaranteed to be low at all times (and with a known
pulldown resistance)