Testing the GPIO pins on 7i92t

More
17 Apr 2024 01:27 - 17 Apr 2024 01:39 #298408 by vally72
I am trying to test the GPIO pins on a Mesa board 7i92t with no success.
This is what I did. I removed the jumpers W1 and W2 for the default pull-up resistors. On P2-01 I connected a 500Ohms pull-up resistor to +5VDC. 
On a terminal I entered:
halrun
loadrt hostmot2
loadrt hm2_eth board_ip="192.168.1.121" config="num_encoders=0 num_pwmgens=0 num_stepgens=0 num_dplls=0"
setp hm2_7i92.0.gpio.000.is_output 1
setp hm2_7i92.0.gpio.000.is_opendrain 1

I connected a voltmeter across P2-01 pin and ground. The voltmeter was showing closed to 5 volts.
I played with setp hm2_7i92.0.gpio.000.out TRUE and setp hm2_7i92.0.gpio.000.out FALSE  expecting the voltage to change between 0V and 5V on the voltmeter. But no change, the voltage stays 5V.
What am I doing wrong?

I mention that I have communication with the board, and "show pin" confirmed all pins are GPIO.
 
Last edit: 17 Apr 2024 01:39 by vally72.

Please Log in or Create an account to join the conversation.

More
17 Apr 2024 03:45 - 17 Apr 2024 03:50 #298410 by PCW
Replied by PCW on topic Testing the GPIO pins on 7i92t
You need to addf the read and write functions to thread1
(after you load the drivers)
and start threads before any I/O will be done to the card:

loadrt threads
addf hm2_7i92.0.read thread1
addf hm2_7i92.0.write thread1
start



You can also do simple I/O tests with mesaflash:

mesaflash --device 7i92t --addr 192.168.1.121 --wpo 0x1300=0x00001 # open drain register value for open drain on bit 0 =  P2.1
mesaflash --device 7i92t --addr 192.168.1.121 --wpo 0x1100=0x00001 # ddr register value to enable output on bit 0 = P2.1
mesaflash --device 7i92t --addr 192.168.1.121 --rpo 0x1000 # read gpio inputs on port P2
mesaflash --device 7i92t --addr 192.168.1.121 --wpo 0x1000=0x00001 # set output bit 0 high = P2.1
mesaflash --device 7i92t --addr 192.168.1.121 --rpo 0x1000 # read gpio inputs on port P2
 
Last edit: 17 Apr 2024 03:50 by PCW. Reason: clarify
The following user(s) said Thank You: vally72

Please Log in or Create an account to join the conversation.

More
17 Apr 2024 12:26 #298436 by vally72
Thank you so much, Peter!

Please Log in or Create an account to join the conversation.

More
18 Apr 2024 02:59 #298524 by vally72
Hi Peter,

I used "mesaflash --device 7i92t --addr 192.168.1.121 --rpo 0x1000" and I got 0x0001FFFF and for "mesaflash --device 7i92t --addr 192.168.1.121 --rpo 0x1004" I got 0x00000000. May I assume that all 17 IO pins on port P2 are set high by default and all 17 IO pins on port P1 are set low by default? I am using "7i92t_5abobx2d.bin" firmware.

Please Log in or Create an account to join the conversation.

More
18 Apr 2024 03:14 #298525 by PCW
Replied by PCW on topic Testing the GPIO pins on 7i92t
All pin are inputs at power up (DDR register = 0)
All output latches are 0 at power up

Since the pins are all inputs at power up,
if not driven by external circuitry,  their
state is determined by whether they
have  pullup or pulldown resistors. This
is determined in turn by W1 and W2.
 

Please Log in or Create an account to join the conversation.

More
18 Apr 2024 04:08 #298527 by vally72
Thank you Peter. But I am confused. With the 7i92t powered on, W1 and W2 jumpers removed, and no Ethernet connection with the host, I have P2-1 pin pulled up to an external 5V through a 500Ohms resistor. All other pins on P2 are unconnected. I get 5V between P2-1 and ground and 4.1V between all other pins on P2 and ground. If I disconnect the external pull up resistor from P2-1, I have 0V on all pins on P2. Somehow, an external pull up resistor on one pin affects the voltage on the other unconnected pins on the same port. Is this normal?

Please Log in or Create an account to join the conversation.

More
18 Apr 2024 04:22 - 18 Apr 2024 04:25 #298528 by PCW
Replied by PCW on topic Testing the GPIO pins on 7i92t
With W1 and W2 removed the input pin states are
undefined until a pin is driven since you end up with
resistive connections between all pins per connector
if the pullup or pulldown resistor common is not
connected to either 5V (W1 or W2 up) or ground
(W1 or W2 down)

Basically, it makes no sense to run the card without
the W1 or W2 jumpers.
Last edit: 18 Apr 2024 04:25 by PCW.

Please Log in or Create an account to join the conversation.

More
18 Apr 2024 15:47 #298564 by vally72
I believe I got it. 7i92t does not have isolated IO's on the same port. When I remove the W1/W2 jumper, two IOs located on the same port are still internally connected by their 4.7K resistors. Thank you, Peter.

Please Log in or Create an account to join the conversation.

More
18 Apr 2024 16:30 #298566 by PCW
Replied by PCW on topic Testing the GPIO pins on 7i92t
Yes, if you disconnect the pullup/pulldown resistor common
(by removing W1 or W2) you would have a 9.4k  resistance
between any 2 IO pins.

(Instead of a 4.7K resistance to 5V or ground and no coupling
between pins if W1 and W2 are installed)
The following user(s) said Thank You: vally72

Please Log in or Create an account to join the conversation.

Time to create page: 0.152 seconds
Powered by Kunena Forum