Firmware request: 5i23+7i52S+2*7i37TA

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20 Jul 2013 19:40 #36823 by matte69
Hello Gentlemänners,

I'm going to build up an old Aciera F35 milling machine to use with LinuxCNC. For this I've ordered a 5i23 and two 7i37TA wich are already here, and a 7i52S for what I'm still waiting for. I'm new to this LinuxCNC stuff, but as I work as a programmer, not new to computer science at all. Yesterday I build up a system with the components and tried my first steps. Anything I will write now are my assumptions, so please correct me if anything is wrong. For the FPGA board I need a special firmware witch pinouts match to those of the 7i52S daughtercard. It consists of 6 stepgens and 6 encoders, where the encoders are multiplexed by two. Because the 7i37TA is an io-board no special firmware is needed but all the pins of the 7i52S have to be on one connector. I found a firmware for a similar setup, but only with 5i20 so I can't use it because of the bigger FPGA size of the 5i23.
So please can you help me and build up such a firmware? I've read that there is needed three files a .BIT, .PIN and .XML, then I can use with with PnCConf, is it right?

So thanks in advance, wish you all a nice weekend.

Greetings from Leipzig, Germany,

Matthias

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21 Jul 2013 00:56 #36835 by PCW
This would be a SVST6_6 config. I will build a 5I23 version on Monday
You can download the source and built it yourself but its a fair amount of
trouble
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21 Jul 2013 03:08 - 21 Jul 2013 21:17 #36844 by matte69
Hello,

I will try to build my own, still loading the Xilinx package. As far as I know I have to edit or create a .vhd file for this. Ok, I found a .vhd file in the hostmot sources from mesa, the PIN_SVST6_6_7I52S_72.vhd. I try it, but it would be great if you could also build one. If you do it on monday you are maybe faster due to poor download speed of the xilinx stuff :S

EDIT: Ok, I've installed Xilinx 9.2, compiling of firmwares from the older hostmot2 sources work out of the box. Tried to use the makefile and phyton scripts with the mesa sources and made some changes on them. But finally no success, the last error where I decided to give up was on applying constraints (ngdbuild), something with *clkmed*. I have no further knowledge of the language and fpga programming, so the field is to wide for me and quick results. As you said, a fair amount of trouble, now I believe :)
Last edit: 21 Jul 2013 21:17 by matte69.

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23 Jul 2013 07:58 #36923 by PCW
freeby.mesanet.com/5i23_svst6_6_7i52s.zip
should work

The source from mesa will work but with ISE <12 you will have to edit the 5I23.ucf file
and comment out the lines involving clkmed. Probably easier with the (bloated) current webpack
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24 Jul 2013 14:40 #36964 by matte69
Thank you, I will try the firmware asap (still have to wait for the 7i52s). I also will try your hints about the ISE.

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24 Jul 2013 20:56 #36982 by PCW
ISE 9.2 does not have the option to ignore unused timing constraints
so you will have to comment out the clkmed lines at the bottom of the .ucf file. These constraints are used for 5I23 configurations that contain the sserial module.
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