I created a new programming language, building a new Hal component model

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22 Nov 2025 00:14 - 22 Nov 2025 14:39 #338933 by smc.collins
Heads up this is ALPHA only CODE !!!!! ALPHA !!!!!!!!!! . I sat down this morning and rewrote my initial post. I was tired so here is the edited post containing all my thoughts. NO WARRANTY OR FITNESS IS IMPLIED OR GIVEN USE AT YOUR OWN RISK !!!!! AiLang & Microkernel Architecture for LinuxCNC – License Grant & Technical OverviewBackground & Motivation

What is Ailang ? 

Ailang is a bijective x86 direct to assembler compiled language. It emits elf files directly, does not depend on LLVM GCC CLANG etc. 


github.com/AiLang-Author/AiLang
github.com/AiLang-Author/CoreUtils-

Background & Motivation

I originally built AiLang for my internal AGI and LLM research—it was designed  for low-level systems programming. The problem it solves for LinuxCNC is simple: writing complex HAL components in C with the current RTAPI is a nightmare. You can't use normal control structures (while, sleep, delay, etc.) or blocking calls without risking realtime violations or outright kernel crashes. Anything beyond trivial I/O explodes into hundreds or thousands of lines of manual state counters, one-shot flags, hand-rolled timers, and flood-controlled error messages.The  toolchanger.comp I had to write is the perfect example. Here's what that looks like in practice:Old way (classic .comp):
  •  C with manual state counters (count1, count2_5, count4_55...)
  • Dozens of separate timers that must be manually reset
  • Runs in realtime thread → one mistake crashes the machine
  • No sleep(), no while(), no normal control structures
  • Debugging = watching 40 cryptic count pins in halscope
  • Copy-paste nightmare for every different turret design
New way (AiLang + microkernel):
  • Readable, low-level syntax that reads like high level code
  • Normal while loops, proper delays, readable state machines
  • Runs as normal userspace process → segfault only kills itself
  • Full debugging with printf() and standard tools
  • Runs in hard realtime with zero Python-style latency penalty
  • LLMs can actually generate correct code from the manual + examples
Why AiLang Works Where Others Fail for LLM's and reasoning as a first class design intent not terseness and typing optimization

AiLang was designed from day one with explicit, verbose syntax that's unambiguous for both humans and LLMs—no operator precedence mysteries, no implicit type coercion, no hidden control flow. Every operation is a named function call or a parenthesized infix expression, which means code generation is deterministic and debuggable. That verbosity is the entire point: when an LLM seesAdd(a, b)
or(a + b)
, there's zero ambiguity about what's happening. When you're debugging a toolchanger at 2 AM, that clarity matters. The compiler generates native x86-64 assembly with zero runtime overhead—no interpreter, no VM, no garbage collection. Early benchmarks show AiLang-compiled utilities outperforming GNU coreutils in typical use cases (100-5000 line files, the sweet spot for source code and config files), and this is before any serious optimization work or SSE vectorization. The toolchanger microkernel compiles to an 18 kB binary that runs for days without issues.


Microkernel Architecture for Hal Components The solution: move everything that isn't cycle-critical into normal Linux userspace processes, leaving only a tiny shim in the realtime thread. Here's what's actually running on my bench right now:


HAL_Microkernel daemon (~600 lines AiLang → ~18 kB binary)
  • Single persistent userspace process that owns shared memory (/tmp/hal_pins.shm, 4 KB expandable)
  • Provides atomic register/read/write of pins from any process with optional change-detection for debugging
  • Runs at 1 kHz when idle, 100 µs when active
  • No root needed—runs as the linuxcnc user
Realtime shim (~150 lines C, currently in alpha testing)
  • Classic LinuxCNC realtime component whose only job is copying HAL pins to/from the microkernel's shared memory at servo-thread rate
  • Zero allocation, zero syscalls, zero blocking—completely safe for hard realtime
  • Once loaded, the rest of the system can forget RTAPI even exists
Userspace services (normal processes)
  • Each complex component (toolchanger, PLC, probe routines, THC, etc.) runs as a normal binary
  • Uses standard while(), sleep_us(), timers, file I/O, networking—anything Linux allows
  • Communicates with HAL only via shared memory → realtime violations are impossible
  • Can be written in AiLang, C, Rust, Python—whatever you want
  • Crash recovery: if a service dies, the microkernel and realtime shim keep running; just restart the dead service
What This Means for the LinuxCNC Ecosystem


This isn't just about toolchangers. The microkernel architecture fundamentally changes what's possible:
  • Complex logic becomes maintainable - Write a 2000-line component without fear of taking down motion
  • Multiple independent services - Run toolchanger + PLC + remote panel + logging simultaneously without fighting over the realtime thread
  • LLM code generation - The deliberately verbose syntax means modern LLMs can actually generate correct, working components when fed the manual and examples
  • Built-in debugging - AiLang has native debug primitives (Debug, DebugPerf, the other debug features are not yet fully implemented in the compiler) that compile to zero overhead in production but give you full visibility during development
  • Easier debugging - Standard printf(), gdb, valgrind—all the normal tools work
  • Safer experimentation - Userspace crashes don't kill the machine
  • Performance - Native compiled code with minimal overhead; typical operations faster than scripting languages by orders of magnitude
  • Long-term vision - Once this is proven stable, the motion backend itself could be rewritten in this architecture
Test code is running on my bench simulating my  Cincinnati 6-position turret that previously required A nightmare C now runs in  readable AiLang as a normal userspace service, with a reactive hardware simulator driving full bidirectional cycles with realistic timing and fault injection.


Documentation:

AiLang ships with 22 full reference manuals covering roughly 90% of language features. If you can read normal programming docs, you can start writing useful LinuxCNC components on day one. Here's what's covered:

Core Language Features:
  • Arithmetic & Math Operations - Dual syntax support (both function calls and infix operators), full bitwise operations, compiler-level math primitives (ISqrt, Abs, Min/Max) implemented as optimized assembly
  • Flow Control - Three-tier documentation from beginner to advanced, proven patterns for 30-level deep recursion at 3 million calls, state machines, pipelines, and ring buffers
  • Functions & SubRoutines - Clear distinction between value-returning Functions and side-effect SubRoutines, full calling convention docs, performance considerations
Memory & Data:
  • Memory Management - Four specialized pool types (FixedPool for globals, DynamicPool for growable collections, TemporalPool for scoped allocations, LinkagePool for structured data), direct heap control with Allocate/Deallocate, zero garbage collection overhead
  • Arrays - Built-in fixed-size arrays as compiler primitives with O(1) access, detailed memory layout documentation, plus library dynamic arrays when you need auto-resize
  • LinkagePool (Structured Data) - Type-safe field-based access, automatic null-checking, supports integers and strings, perfect for passing complex data between functions
System Programming:
  • Unix/Linux Syscall API - Complete coverage of process management (fork, exec, wait, kill), IPC (pipes), time functions, with real syscall numbers and register usage documented
  • Advanced Patterns - Working examples of ring buffers, state machines, producer-consumer, memory pools, all tested in production code
Developer Experience:
  • Built-in Debugging - Native debug primitives compile conditionally (zero overhead when disabled), DebugAssert for safety, DebugTrace for execution flow, DebugPerf for performance profiling, DebugMemory for leak detection
  • Getting Started Guide - Practical introduction with working examples, common patterns, compilation instructions
The manuals aren't just API references—they include exact byte layouts, register allocations, assembly patterns, performance characteristics, and real-world examples. Flow-control docs alone span beginner guides through stress-test documentation proving 30-level recursion at three million calls. Memory docs provide exact byte layouts for every pool type plus decision matrices for choosing the right one.License Grant

Git hub page, all linuxcnc specific code is MIT licensed

github.com/AiLang-Author/LinuxCNC-HAL-Component-Redesign


Effective immediately, the LinuxCNC project has a perpetual, irrevocable, royalty-free license to AiLang and the entire compiler toolchain for use in LinuxCNC and related open-source efforts. If anyone needs a signed/notarized hard copy for official records, let me know the correct contact channel.For individual use: hobby, education, private, and non-commercial use is freely permitted. Non-profits and research institutions are welcome—contact me for a written license to keep everything clear (copyright remains with my estate).Current Status
  • Microkernel daemon: stable under load, runs for days without issues
  • Toolchanger logic: Tech Demonstrator, full bidirectional cycles with fault injection pass in simulation
  • Realtime shim: alpha testing (~150 lines C, nearly complete)
  • Hardware validation: Next step is testing on actual machine hardware
  • Known limitations: Pin collision detection not yet implemented (coming soon)
The userspace components (microkernel, toolchanger services) are running in simulation. The shim is one of many pieces being validated. Once sufficient testing is complete, any machine with a modern kernel (PREEMPT-RT or 6.1+ mainline) can run complex components with zero risk to motion. Examples (microkernel, toolchanger, and test harness) are all in the repo. The simulation works. Multiple component validation is the next milestone.

I have attached a zip file with my current working code, the ailang compiler is very easy to use. If you have any questions post them up this is the first public disclosure of the language I have made. Feedback welcome. 
Attachments:
Last edit: 22 Nov 2025 14:39 by smc.collins.
The following user(s) said Thank You: COFHAL

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22 Nov 2025 00:41 #338934 by langdons
Consider using the ISC license.

It's basically the same as MIT, but shorter and more concise.

cvsweb.openbsd.org/src/share/misc/license.template?rev=HEAD

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22 Nov 2025 00:52 #338935 by smc.collins
yeah it';s MIT licensed, not doing the bike shedding thing, if you have PR's for the repo or language lmk !

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22 Nov 2025 01:01 #338937 by langdons
Try benchmarking AiLang against FreeBSD utilities.

GNU makes some cool stuff, but it's not necessarily benchmark-candidate worthy.

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22 Nov 2025 01:08 #338938 by smc.collins
feel free , let me know how it goes !!!!. i don't used freebsd but PR;s accepted !

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