Mesa 5i20 - 7I52S support

Peter if you can supply the PIN file for the 7i52 firmware I probably can convince PNCconf (from version 2.5) to configure all but the offset comp.

If the BIAS is added, it should be 234 (so a -234 mm/sec velocity request from the PID output is translated to a 0 PWM value)

In addition the PWM scale should be set to 468 and the PID components MAX_OUTPUT should be set to 234 (that way the PIDs requested -234 velocity generates 0 PWM and +234 velocity generates 468 = full scale PWM)

I'm not sure how they are applied but there are already provisions output offsetting (OUTPUT_OFFSET)
Note that if it works it would have the opposite sign of your (added) BIAS (-234) since it its subtracted

As far as bitfiles are concerned, I would have to build a bit file. I would probably make the output pairs on the 7I52S PWM and ENABLE

freeby.mesanet.com/sv6la.zip
contains the bit file/ pin file and changed pin-out vhdl source

PCW, thank you..

Now I might need some help with HAL config ( what to change in pncconf)

What version of EMC are you using?

Currently I am using compiled version 2.4.6. I can also install 2.5 if required.

You will need 2.5 to support the 7I52s muxed encoders

ok when you have EMC 2.5

I hand wrote a stripped down XML file for the firmware Peter supplied.
download this file and unzip it in the folder ( /lib/firmware/hm2/5i20 ) that has the BIT firmware files in it (you need sudo power)

then run pncconf. The first page should say beta1 - thats the right version

you should find the firmware in the firmware combo box.

let me know how it worked.

Chris M

Hi,

It works without problems. Looking at the README file, There is only one pin for each encoder. To my understanding, there should be at least INDEX pin as well?


The following is pncconf README output

P2-1 0 (0 GPIO Input) unused-input
P2-3 1 (0 Muxed Encoder 0) x-encoder-a
P2-5 2 (0 Muxed Encoder 1) y-encoder-a
P2-7 3 (0 muxed enc) unused-encoder
P2-9 4 (1 Muxed Encoder 0) z-encoder-a
P2-11 5 (1 Muxed Encoder 1) s-encoder-a
P2-13 6 (1 muxed enc) unused-encoder

HAL file is attached

Here's a part of the .PIN file (which is read from the IDROM and indicates the internal FPGA wring)
So I suspect everything will work but it looks like pncconf doesn't recognize Muxed counter indexes


Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir

1 0 IOPort None
3 1 IOPort MuxQCnt 0 MuxQ-A (In)
5 2 IOPort MuxQCnt 0 MuxQ-B (In)
7 3 IOPort MuxQCnt 0 MuxQ-IDX (In)
9 4 IOPort MuxQCnt 1 MuxQ-A (In)
11 5 IOPort MuxQCnt 1 MuxQ-B (In)
13 6 IOPort MuxQCnt 1 MuxQ-IDX (In)
15 7 IOPort MuxQCnt 2 MuxQ-A (In)
17 8 IOPort MuxQCnt 2 MuxQ-B (In)
19 9 IOPort MuxQCnt 2 MuxQ-IDX (In)
21 10 IOPort MuxQSel 0 MuxSel0 (Out)

Note because of the Muxed encoders there are only about 1/2 as many interface pins as encoders signals. That is the interface signals MuxQ-A0,MuxQ-B0, and MuxQ-IDX0 support encoder channels 0 and 1