Mesa 7I52 with 3x20/7I68

Here we go with the correct information now;

Debug file information:
insmod: error inserting '/usr/realtime-3.4.55-rtai-2/modules/linuxcnc/hm2_pci.ko': -1 No such device
hm2-encstepper.hal:42: exit value: 1
hm2-encstepper.hal:42: insmod failed, returned -1

Is this referring to Line 42 of hm2_pci.ko which my text editor shows as - hm2_6i25.%d 6slx9pq144 hm2_pci: discovered OLD 4i68 at %s, please consider upgrading your EEPROM

Thanks

correction, line 42 of hm2-encstepper.hal

loadrt [HOSTMOT2](DRIVER) config=[HOSTMOT2](CONFIG)

Is the 3X20 found?

That is does

lspci -n | grep 9056

return anything?

Also running linuxcnc from the command line sometime helps with the error messages

I just verified that those configs load and run on my test setup but you do need to
1. install the firmware in /lib/firmware/hm2/3x20-1/firmwarename
2. make sure the path and name of the firmware match the path and name in the .ini file

Power light is ON 7I68 but no card on lspci

The 3x20 has CR2 flashing, I would not think this could prevent the cards being seen? (CR2 FPGA /INIT On for FPGA reset/CRC error)

Will check the .ini file as suggested

Confirmed svst24_24.bit in 3x20-1 directory

Confirmed change to bit filename in 3x20encstep.ini from original BIT files

[HOSTMOT2]
DRIVER=hm2_pci
BOARD=3x20
CONFIG="firmware=hm2/3x20-1/svst24_24.bit num_encoders=3 num_stepgens=3"

if lspci does not show a 9056 bridge that needs to be addressed first

is the green link light on on the 6I71?

Is the 3X20 power on before the PC is powered on?

You might want to set the config mode of 3X20 to disable loading the FPGA from flash (set W8 down)

Make sure you use the 6I71 in a 1 lane slot
(many BIOS do not support 1 lane devices in 16 lane slots even though this is required by the PCIE spec)

Turned out to be the slot as suggested, cheers. Moved 6I71 from PCIE_2 to PCIE_1, cycled power to PC and green lights all round on the Mesa boards.

LinuxCNC now starts albeit with latency errors. Tested encoder by manual movement and sighting count up and down in LinuxCNC.

Onto step + dir testing. /TX0BENA is high on pin 47 of 50W header on 7I52S so appears to disable TX0 on the P3 connector.

Should control of TX0x be managed as a general output with M64/65 or is best practice another method?

Both TXEN0 and TXEN3 need to be set low to enable the associated 7I52S outputs.

For step/dir use they can just be hardwired low in the HAL file:

setp hm2_[HOSTMOT2](BOARD).0.gpio.000.is_output true
setp hm2_[HOSTMOT2](BOARD).0.gpio.023.is_output true

setp hm2_[HOSTMOT2](BOARD).0.gpio.000.out false
setp hm2_[HOSTMOT2](BOARD).0.gpio.023.out false

(for the 7I52S on the first connector)

Peter just to confirm the connections you have listed in your email would be as per below,

GPIO Signal Name
00 7I68 - P4-01 TX3 B ENA 7I52S - P3-05 & 06
23 7I68 - P4-47 TX0 B ENA 7I52S - P2-05 & 06

I think its 7I68 P5 for I/O 0..23 (the connectors in a funny order on the 7I68)