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Mesa 7i95

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6 years 6 months ago #162586 by PCW
Replied by PCW on topic Mesa 7i95
fallback:
freeby.mesanet.com/7i95_fallback.bit
Standard bitfile:
freeby.mesanet.com/7i95_d.bit
The following user(s) said Thank You: Hamada

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6 years 6 months ago #164919 by Hamada
Replied by Hamada on topic Mesa 7i95
Hi Peter

i'm adding 4 x PWMAOutpin + 2 PWMCEnapin on 7i95 expansion port as below (copy from PIN-7i97D-51.vhdl and changed PWMTAG INSTANCES entry = x05) . And ISE can compiled to end without problem


I changed to 5 x PWMAOutpin + 3 PWMCEnapin but ISE stop at phase 4 during compile



Pls help to assist on this

Thanks

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6 years 6 months ago #164968 by PCW
Replied by PCW on topic Mesa 7i95
You are probably out of FPGA resources, you might have to remove some unused
functions to add 6 PWMGens. Also when you add the PWM module to the
module descriptors, there must be no intervening null tags (the driver stops looking
for modules at the first null tag)

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6 years 6 months ago #165046 by Hamada
Replied by Hamada on topic Mesa 7i95
Hi Peter

it worked after I cut StepGen INSTANCES entry to 4 only

Thank you so much

Hamada

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6 years 6 months ago - 6 years 6 months ago #166280 by Pro_El
Replied by Pro_El on topic Mesa 7i95
Thanks cmorley for effort adding this great board 7i95 to Pncconf. I do not now but if it is possible please add support in Pncconf to select step/dir or pwm/dir output so we ordinary users have opportunity to change mode and use different control drives.

Thanks for great work..
Last edit: 6 years 6 months ago by Pro_El.

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6 years 3 months ago #173857 by trial31
Replied by trial31 on topic Mesa 7i95
Hi,
first of all: sorry for my English :-)

i try to work with a 7i95 but I have some problems....
I'm using the last master LCNC branch on Debian:

uname -a
Linux MacchinaInfernale 4.9.0-12-rt-686-pae #1 SMP PREEMPT RT Debian 4.9.210-1+deb9u1 (2020-06-07) i686 GNU/Linux

I have started linuxcnc using only gpios input but not with inmux (only inmux.00.input-00 is present)

typing halcmd show pin hm*:
Code:
Component Pins: Owner Type Dir Value Name 26 float IN 100 hm2_7i95.0.dpll.01.timer-us 26 float IN 100 hm2_7i95.0.dpll.02.timer-us 26 float IN 100 hm2_7i95.0.dpll.03.timer-us 26 float IN 100 hm2_7i95.0.dpll.04.timer-us 26 float IN 1 hm2_7i95.0.dpll.base-freq-khz 26 u32 OUT 0x0000002A hm2_7i95.0.dpll.ddsize 26 float OUT 0.4405407 hm2_7i95.0.dpll.phase-error-us 26 u32 IN 0x00400000 hm2_7i95.0.dpll.plimit 26 u32 OUT 0x00000018 hm2_7i95.0.dpll.prescale 26 u32 IN 0x000007D0 hm2_7i95.0.dpll.time-const 26 s32 OUT 0 hm2_7i95.0.encoder.00.count 26 s32 OUT 0 hm2_7i95.0.encoder.00.count-latched 26 bit I/O FALSE hm2_7i95.0.encoder.00.index-enable <=> a-index-enable 26 bit OUT FALSE hm2_7i95.0.encoder.00.input-a 26 bit OUT FALSE hm2_7i95.0.encoder.00.input-b 26 bit OUT TRUE hm2_7i95.0.encoder.00.input-index 26 bit IN FALSE hm2_7i95.0.encoder.00.latch-enable 26 bit IN FALSE hm2_7i95.0.encoder.00.latch-polarity 26 float OUT 0 hm2_7i95.0.encoder.00.position ==> a-pos-fb 26 float OUT 0 hm2_7i95.0.encoder.00.position-latched 26 bit OUT FALSE hm2_7i95.0.encoder.00.quad-error 26 bit IN FALSE hm2_7i95.0.encoder.00.quad-error-enable 26 s32 OUT 0 hm2_7i95.0.encoder.00.rawcounts ==> a-pos-rawcounts 26 s32 OUT 0 hm2_7i95.0.encoder.00.rawlatch 26 bit IN FALSE hm2_7i95.0.encoder.00.reset 26 float OUT 0 hm2_7i95.0.encoder.00.velocity ==> a-vel-fb 26 float OUT 0 hm2_7i95.0.encoder.00.velocity-rpm 26 s32 OUT 0 hm2_7i95.0.encoder.01.count 26 s32 OUT 0 hm2_7i95.0.encoder.01.count-latched 26 bit I/O FALSE hm2_7i95.0.encoder.01.index-enable 26 bit OUT FALSE hm2_7i95.0.encoder.01.input-a 26 bit OUT FALSE hm2_7i95.0.encoder.01.input-b 26 bit OUT TRUE hm2_7i95.0.encoder.01.input-index 26 bit IN FALSE hm2_7i95.0.encoder.01.latch-enable 26 bit IN FALSE hm2_7i95.0.encoder.01.latch-polarity 26 float OUT 0 hm2_7i95.0.encoder.01.position 26 float OUT 0 hm2_7i95.0.encoder.01.position-latched 26 bit OUT FALSE hm2_7i95.0.encoder.01.quad-error 26 bit IN FALSE hm2_7i95.0.encoder.01.quad-error-enable 26 s32 OUT 0 hm2_7i95.0.encoder.01.rawcounts 26 s32 OUT 0 hm2_7i95.0.encoder.01.rawlatch 26 bit IN FALSE hm2_7i95.0.encoder.01.reset 26 float OUT 0 hm2_7i95.0.encoder.01.velocity 26 float OUT 0 hm2_7i95.0.encoder.01.velocity-rpm 26 s32 OUT 0 hm2_7i95.0.encoder.02.count 26 s32 OUT 0 hm2_7i95.0.encoder.02.count-latched 26 bit I/O FALSE hm2_7i95.0.encoder.02.index-enable 26 bit OUT FALSE hm2_7i95.0.encoder.02.input-a 26 bit OUT FALSE hm2_7i95.0.encoder.02.input-b 26 bit OUT TRUE hm2_7i95.0.encoder.02.input-index 26 bit IN FALSE hm2_7i95.0.encoder.02.latch-enable 26 bit IN FALSE hm2_7i95.0.encoder.02.latch-polarity 26 float OUT 0 hm2_7i95.0.encoder.02.position 26 float OUT 0 hm2_7i95.0.encoder.02.position-latched 26 bit OUT FALSE hm2_7i95.0.encoder.02.quad-error 26 bit IN FALSE hm2_7i95.0.encoder.02.quad-error-enable 26 s32 OUT 0 hm2_7i95.0.encoder.02.rawcounts 26 s32 OUT 0 hm2_7i95.0.encoder.02.rawlatch 26 bit IN FALSE hm2_7i95.0.encoder.02.reset 26 float OUT 0 hm2_7i95.0.encoder.02.velocity 26 float OUT 0 hm2_7i95.0.encoder.02.velocity-rpm 26 s32 OUT 0 hm2_7i95.0.encoder.03.count 26 s32 OUT 0 hm2_7i95.0.encoder.03.count-latched 26 bit I/O FALSE hm2_7i95.0.encoder.03.index-enable 26 bit OUT FALSE hm2_7i95.0.encoder.03.input-a 26 bit OUT FALSE hm2_7i95.0.encoder.03.input-b 26 bit OUT TRUE hm2_7i95.0.encoder.03.input-index 26 bit IN FALSE hm2_7i95.0.encoder.03.latch-enable 26 bit IN FALSE hm2_7i95.0.encoder.03.latch-polarity 26 float OUT 0 hm2_7i95.0.encoder.03.position 26 float OUT 0 hm2_7i95.0.encoder.03.position-latched 26 bit OUT FALSE hm2_7i95.0.encoder.03.quad-error 26 bit IN FALSE hm2_7i95.0.encoder.03.quad-error-enable 26 s32 OUT 0 hm2_7i95.0.encoder.03.rawcounts 26 s32 OUT 0 hm2_7i95.0.encoder.03.rawlatch 26 bit IN FALSE hm2_7i95.0.encoder.03.reset 26 float OUT 0 hm2_7i95.0.encoder.03.velocity 26 float OUT 0 hm2_7i95.0.encoder.03.velocity-rpm 26 s32 OUT 0 hm2_7i95.0.encoder.04.count 26 s32 OUT 0 hm2_7i95.0.encoder.04.count-latched 26 bit I/O FALSE hm2_7i95.0.encoder.04.index-enable 26 bit OUT FALSE hm2_7i95.0.encoder.04.input-a 26 bit OUT FALSE hm2_7i95.0.encoder.04.input-b 26 bit OUT TRUE hm2_7i95.0.encoder.04.input-index 26 bit IN FALSE hm2_7i95.0.encoder.04.latch-enable 26 bit IN FALSE hm2_7i95.0.encoder.04.latch-polarity 26 float OUT 0 hm2_7i95.0.encoder.04.position 26 float OUT 0 hm2_7i95.0.encoder.04.position-latched 26 bit OUT FALSE hm2_7i95.0.encoder.04.quad-error 26 bit IN FALSE hm2_7i95.0.encoder.04.quad-error-enable 26 s32 OUT 0 hm2_7i95.0.encoder.04.rawcounts 26 s32 OUT 0 hm2_7i95.0.encoder.04.rawlatch 26 bit IN FALSE hm2_7i95.0.encoder.04.reset 26 float OUT 0 hm2_7i95.0.encoder.04.velocity 26 float OUT 0 hm2_7i95.0.encoder.04.velocity-rpm 26 s32 OUT 0 hm2_7i95.0.encoder.05.count 26 s32 OUT 0 hm2_7i95.0.encoder.05.count-latched 26 bit I/O FALSE hm2_7i95.0.encoder.05.index-enable 26 bit OUT FALSE hm2_7i95.0.encoder.05.input-a 26 bit OUT FALSE hm2_7i95.0.encoder.05.input-b 26 bit OUT TRUE hm2_7i95.0.encoder.05.input-index 26 bit IN FALSE hm2_7i95.0.encoder.05.latch-enable 26 bit IN FALSE hm2_7i95.0.encoder.05.latch-polarity 26 float OUT 0 hm2_7i95.0.encoder.05.position 26 float OUT 0 hm2_7i95.0.encoder.05.position-latched 26 bit OUT FALSE hm2_7i95.0.encoder.05.quad-error 26 bit IN FALSE hm2_7i95.0.encoder.05.quad-error-enable 26 s32 OUT 0 hm2_7i95.0.encoder.05.rawcounts 26 s32 OUT 0 hm2_7i95.0.encoder.05.rawlatch 26 bit IN FALSE hm2_7i95.0.encoder.05.reset 26 float OUT 0 hm2_7i95.0.encoder.05.velocity 26 float OUT 0 hm2_7i95.0.encoder.05.velocity-rpm 26 bit IN FALSE hm2_7i95.0.encoder.hires-timestamp 26 u32 IN 0x007F2815 hm2_7i95.0.encoder.muxed-sample-frequency 26 s32 IN -1 hm2_7i95.0.encoder.timer-number 26 bit OUT FALSE hm2_7i95.0.gpio.000.in ==> min-x 26 bit OUT TRUE hm2_7i95.0.gpio.000.in_not 26 bit OUT FALSE hm2_7i95.0.gpio.001.in ==> max-x 26 bit OUT TRUE hm2_7i95.0.gpio.001.in_not 26 bit OUT FALSE hm2_7i95.0.gpio.002.in ==> min-y 26 bit OUT TRUE hm2_7i95.0.gpio.002.in_not 26 bit OUT FALSE hm2_7i95.0.gpio.003.in ==> max-y 26 bit OUT TRUE hm2_7i95.0.gpio.003.in_not 26 bit OUT FALSE hm2_7i95.0.gpio.004.in ==> min-z 26 bit OUT TRUE hm2_7i95.0.gpio.004.in_not 26 bit OUT FALSE hm2_7i95.0.gpio.005.in ==> max-z 26 bit OUT TRUE hm2_7i95.0.gpio.005.in_not 26 bit OUT FALSE hm2_7i95.0.gpio.006.in ==> home-x 26 bit OUT TRUE hm2_7i95.0.gpio.006.in_not 26 bit OUT FALSE hm2_7i95.0.gpio.007.in ==> home-y 26 bit OUT TRUE hm2_7i95.0.gpio.007.in_not 26 bit OUT FALSE hm2_7i95.0.gpio.008.in ==> home-y2 26 bit OUT TRUE hm2_7i95.0.gpio.008.in_not 26 bit OUT FALSE hm2_7i95.0.gpio.009.in ==> home-z 26 bit OUT TRUE hm2_7i95.0.gpio.009.in_not 26 bit OUT FALSE hm2_7i95.0.gpio.010.in 26 bit OUT TRUE hm2_7i95.0.gpio.010.in_not 26 bit OUT FALSE hm2_7i95.0.gpio.011.in 26 bit OUT TRUE hm2_7i95.0.gpio.011.in_not 26 bit OUT TRUE hm2_7i95.0.gpio.012.in 26 bit OUT FALSE hm2_7i95.0.gpio.012.in_not 26 bit IN FALSE hm2_7i95.0.gpio.012.out 26 bit OUT TRUE hm2_7i95.0.gpio.013.in 26 bit OUT FALSE hm2_7i95.0.gpio.013.in_not 26 bit IN FALSE hm2_7i95.0.gpio.013.out 26 bit OUT TRUE hm2_7i95.0.gpio.014.in 26 bit OUT FALSE hm2_7i95.0.gpio.014.in_not 26 bit IN FALSE hm2_7i95.0.gpio.014.out 26 bit OUT TRUE hm2_7i95.0.gpio.015.in 26 bit OUT FALSE hm2_7i95.0.gpio.015.in_not 26 bit IN FALSE hm2_7i95.0.gpio.015.out 26 bit OUT TRUE hm2_7i95.0.gpio.016.in 26 bit OUT FALSE hm2_7i95.0.gpio.016.in_not 26 bit IN FALSE hm2_7i95.0.gpio.016.out 26 bit OUT TRUE hm2_7i95.0.gpio.017.in 26 bit OUT FALSE hm2_7i95.0.gpio.017.in_not 26 bit IN FALSE hm2_7i95.0.gpio.017.out 26 bit OUT FALSE hm2_7i95.0.gpio.018.in 26 bit OUT TRUE hm2_7i95.0.gpio.018.in_not 26 bit OUT FALSE hm2_7i95.0.gpio.019.in 26 bit OUT TRUE hm2_7i95.0.gpio.019.in_not 26 bit OUT FALSE hm2_7i95.0.gpio.020.in 26 bit OUT TRUE hm2_7i95.0.gpio.020.in_not 26 bit OUT FALSE hm2_7i95.0.gpio.021.in 26 bit OUT TRUE hm2_7i95.0.gpio.021.in_not 26 bit OUT FALSE hm2_7i95.0.gpio.022.in 26 bit OUT TRUE hm2_7i95.0.gpio.022.in_not 26 bit OUT FALSE hm2_7i95.0.gpio.023.in 26 bit OUT TRUE hm2_7i95.0.gpio.023.in_not 26 bit OUT FALSE hm2_7i95.0.gpio.024.in 26 bit OUT TRUE hm2_7i95.0.gpio.024.in_not 26 bit OUT FALSE hm2_7i95.0.gpio.025.in 26 bit OUT TRUE hm2_7i95.0.gpio.025.in_not 26 bit OUT FALSE hm2_7i95.0.gpio.026.in 26 bit OUT TRUE hm2_7i95.0.gpio.026.in_not 26 bit OUT FALSE hm2_7i95.0.gpio.027.in 26 bit OUT TRUE hm2_7i95.0.gpio.027.in_not 26 bit OUT TRUE hm2_7i95.0.gpio.028.in 26 bit OUT FALSE hm2_7i95.0.gpio.028.in_not 26 bit OUT FALSE hm2_7i95.0.gpio.029.in 26 bit OUT TRUE hm2_7i95.0.gpio.029.in_not 26 bit OUT TRUE hm2_7i95.0.gpio.030.in 26 bit OUT FALSE hm2_7i95.0.gpio.030.in_not 26 bit OUT FALSE hm2_7i95.0.gpio.031.in 26 bit OUT TRUE hm2_7i95.0.gpio.031.in_not 26 bit OUT TRUE hm2_7i95.0.gpio.032.in 26 bit OUT FALSE hm2_7i95.0.gpio.032.in_not 26 bit OUT TRUE hm2_7i95.0.gpio.033.in 26 bit OUT FALSE hm2_7i95.0.gpio.033.in_not 26 bit OUT TRUE hm2_7i95.0.gpio.034.in 26 bit OUT FALSE hm2_7i95.0.gpio.034.in_not 26 bit OUT TRUE hm2_7i95.0.gpio.035.in 26 bit OUT FALSE hm2_7i95.0.gpio.035.in_not 26 bit OUT TRUE hm2_7i95.0.gpio.036.in 26 bit OUT FALSE hm2_7i95.0.gpio.036.in_not 26 bit OUT TRUE hm2_7i95.0.gpio.037.in 26 bit OUT FALSE hm2_7i95.0.gpio.037.in_not 26 bit OUT TRUE hm2_7i95.0.gpio.038.in 26 bit OUT FALSE hm2_7i95.0.gpio.038.in_not 26 bit OUT TRUE hm2_7i95.0.gpio.039.in 26 bit OUT FALSE hm2_7i95.0.gpio.039.in_not 26 bit OUT TRUE hm2_7i95.0.gpio.040.in 26 bit OUT FALSE hm2_7i95.0.gpio.040.in_not 26 bit OUT TRUE hm2_7i95.0.gpio.041.in 26 bit OUT FALSE hm2_7i95.0.gpio.041.in_not 26 bit IN FALSE hm2_7i95.0.gpio.041.out 26 bit OUT TRUE hm2_7i95.0.gpio.042.in 26 bit OUT FALSE hm2_7i95.0.gpio.042.in_not 26 bit IN FALSE hm2_7i95.0.gpio.042.out 26 bit OUT TRUE hm2_7i95.0.gpio.043.in 26 bit OUT FALSE hm2_7i95.0.gpio.043.in_not 26 bit IN FALSE hm2_7i95.0.gpio.043.out 26 bit OUT TRUE hm2_7i95.0.gpio.044.in 26 bit OUT FALSE hm2_7i95.0.gpio.044.in_not 26 bit IN FALSE hm2_7i95.0.gpio.044.out 26 bit OUT TRUE hm2_7i95.0.gpio.045.in 26 bit OUT FALSE hm2_7i95.0.gpio.045.in_not 26 bit IN FALSE hm2_7i95.0.gpio.045.out 26 bit OUT TRUE hm2_7i95.0.gpio.046.in 26 bit OUT FALSE hm2_7i95.0.gpio.046.in_not 26 bit IN FALSE hm2_7i95.0.gpio.046.out 26 bit OUT TRUE hm2_7i95.0.gpio.047.in 26 bit OUT FALSE hm2_7i95.0.gpio.047.in_not 26 bit IN FALSE hm2_7i95.0.gpio.047.out 26 bit OUT TRUE hm2_7i95.0.gpio.048.in 26 bit OUT FALSE hm2_7i95.0.gpio.048.in_not 26 bit IN FALSE hm2_7i95.0.gpio.048.out 26 bit OUT TRUE hm2_7i95.0.gpio.049.in 26 bit OUT FALSE hm2_7i95.0.gpio.049.in_not 26 bit IN FALSE hm2_7i95.0.gpio.049.out 26 bit OUT TRUE hm2_7i95.0.gpio.050.in 26 bit OUT FALSE hm2_7i95.0.gpio.050.in_not 26 bit IN FALSE hm2_7i95.0.gpio.050.out 26 bit OUT TRUE hm2_7i95.0.gpio.051.in 26 bit OUT FALSE hm2_7i95.0.gpio.051.in_not 26 bit IN FALSE hm2_7i95.0.gpio.051.out 26 bit OUT TRUE hm2_7i95.0.gpio.052.in 26 bit OUT FALSE hm2_7i95.0.gpio.052.in_not 26 bit IN FALSE hm2_7i95.0.gpio.052.out 26 bit OUT TRUE hm2_7i95.0.gpio.053.in 26 bit OUT FALSE hm2_7i95.0.gpio.053.in_not 26 bit IN FALSE hm2_7i95.0.gpio.053.out 26 bit OUT TRUE hm2_7i95.0.gpio.054.in 26 bit OUT FALSE hm2_7i95.0.gpio.054.in_not 26 bit IN FALSE hm2_7i95.0.gpio.054.out 26 bit OUT TRUE hm2_7i95.0.gpio.055.in 26 bit OUT FALSE hm2_7i95.0.gpio.055.in_not 26 bit IN FALSE hm2_7i95.0.gpio.055.out 26 bit OUT TRUE hm2_7i95.0.gpio.056.in 26 bit OUT FALSE hm2_7i95.0.gpio.056.in_not 26 bit IN FALSE hm2_7i95.0.gpio.056.out 26 bit OUT TRUE hm2_7i95.0.gpio.057.in 26 bit OUT FALSE hm2_7i95.0.gpio.057.in_not 26 bit IN FALSE hm2_7i95.0.gpio.057.out 26 s32 OUT 10 hm2_7i95.0.inmux.00.enc0-count 26 s32 OUT 2 hm2_7i95.0.inmux.00.enc1-count 26 s32 OUT -4 hm2_7i95.0.inmux.00.enc2-count 26 s32 OUT -124 hm2_7i95.0.inmux.00.enc3-count 26 bit OUT FALSE hm2_7i95.0.inmux.00.input-00 26 bit OUT TRUE hm2_7i95.0.inmux.00.input-00-not 26 bit IN FALSE hm2_7i95.0.inmux.00.input-00-slow 26 bit OUT FALSE hm2_7i95.0.inmux.00.raw-input-00 26 bit OUT TRUE hm2_7i95.0.inmux.00.raw-input-00-not 26 bit IN FALSE hm2_7i95.0.led.CR01 26 bit IN FALSE hm2_7i95.0.led.CR02 26 bit IN FALSE hm2_7i95.0.led.CR03 26 bit IN FALSE hm2_7i95.0.led.CR04 26 bit OUT FALSE hm2_7i95.0.packet-error 26 bit OUT FALSE hm2_7i95.0.packet-error-exceeded 26 s32 OUT 0 hm2_7i95.0.packet-error-level 26 s32 OUT 0 hm2_7i95.0.read-request.time 26 s32 OUT 291606 hm2_7i95.0.read.time 26 bit IN FALSE hm2_7i95.0.ssr.00.out-00 <== spindle-enable 26 bit IN FALSE hm2_7i95.0.ssr.00.out-01 <== machine-is-enabled 26 bit IN FALSE hm2_7i95.0.ssr.00.out-02 26 bit IN FALSE hm2_7i95.0.ssr.00.out-03 26 bit IN FALSE hm2_7i95.0.ssr.00.out-04 26 bit IN FALSE hm2_7i95.0.ssr.00.out-05 26 u32 IN 0x000F4240 hm2_7i95.0.ssr.00.rate 26 bit IN TRUE hm2_7i95.0.stepgen.00.control-type 26 s32 OUT 0 hm2_7i95.0.stepgen.00.counts 26 float OUT 0 hm2_7i95.0.stepgen.00.dbg_err_at_match 26 float OUT 0 hm2_7i95.0.stepgen.00.dbg_ff_vel 26 float OUT 0 hm2_7i95.0.stepgen.00.dbg_pos_minus_prev_cmd 26 float OUT 0 hm2_7i95.0.stepgen.00.dbg_s_to_match 26 s32 OUT 0 hm2_7i95.0.stepgen.00.dbg_step_rate 26 float OUT 0 hm2_7i95.0.stepgen.00.dbg_vel_error 26 bit IN FALSE hm2_7i95.0.stepgen.00.enable <== x-enable 26 float IN 0 hm2_7i95.0.stepgen.00.position-cmd 26 float OUT 0 hm2_7i95.0.stepgen.00.position-fb ==> x-pos-fb 26 float IN 0 hm2_7i95.0.stepgen.00.velocity-cmd <== x-output 26 float OUT 0 hm2_7i95.0.stepgen.00.velocity-fb 26 bit IN TRUE hm2_7i95.0.stepgen.01.control-type 26 s32 OUT 0 hm2_7i95.0.stepgen.01.counts 26 float OUT 0 hm2_7i95.0.stepgen.01.dbg_err_at_match 26 float OUT 0 hm2_7i95.0.stepgen.01.dbg_ff_vel 26 float OUT 0 hm2_7i95.0.stepgen.01.dbg_pos_minus_prev_cmd 26 float OUT 0 hm2_7i95.0.stepgen.01.dbg_s_to_match 26 s32 OUT 0 hm2_7i95.0.stepgen.01.dbg_step_rate 26 float OUT 0 hm2_7i95.0.stepgen.01.dbg_vel_error 26 bit IN FALSE hm2_7i95.0.stepgen.01.enable <== y-enable 26 float IN 0 hm2_7i95.0.stepgen.01.position-cmd 26 float OUT 0 hm2_7i95.0.stepgen.01.position-fb ==> y-pos-fb 26 float IN 0 hm2_7i95.0.stepgen.01.velocity-cmd <== y-output 26 float OUT 0 hm2_7i95.0.stepgen.01.velocity-fb 26 bit IN TRUE hm2_7i95.0.stepgen.02.control-type 26 s32 OUT 0 hm2_7i95.0.stepgen.02.counts 26 float OUT 0 hm2_7i95.0.stepgen.02.dbg_err_at_match 26 float OUT 0 hm2_7i95.0.stepgen.02.dbg_ff_vel 26 float OUT 0 hm2_7i95.0.stepgen.02.dbg_pos_minus_prev_cmd 26 float OUT 0 hm2_7i95.0.stepgen.02.dbg_s_to_match 26 s32 OUT 0 hm2_7i95.0.stepgen.02.dbg_step_rate 26 float OUT 0 hm2_7i95.0.stepgen.02.dbg_vel_error 26 bit IN FALSE hm2_7i95.0.stepgen.02.enable <== y2-enable 26 float IN 0 hm2_7i95.0.stepgen.02.position-cmd 26 float OUT 0 hm2_7i95.0.stepgen.02.position-fb ==> y2-pos-fb 26 float IN 0 hm2_7i95.0.stepgen.02.velocity-cmd <== y2-output 26 float OUT 0 hm2_7i95.0.stepgen.02.velocity-fb 26 bit IN TRUE hm2_7i95.0.stepgen.03.control-type 26 s32 OUT 0 hm2_7i95.0.stepgen.03.counts 26 float OUT 0 hm2_7i95.0.stepgen.03.dbg_err_at_match 26 float OUT 0 hm2_7i95.0.stepgen.03.dbg_ff_vel 26 float OUT 0 hm2_7i95.0.stepgen.03.dbg_pos_minus_prev_cmd 26 float OUT 0 hm2_7i95.0.stepgen.03.dbg_s_to_match 26 s32 OUT 0 hm2_7i95.0.stepgen.03.dbg_step_rate 26 float OUT 0 hm2_7i95.0.stepgen.03.dbg_vel_error 26 bit IN FALSE hm2_7i95.0.stepgen.03.enable <== z-enable 26 float IN 0 hm2_7i95.0.stepgen.03.position-cmd 26 float OUT 0 hm2_7i95.0.stepgen.03.position-fb ==> z-pos-fb 26 float IN 0 hm2_7i95.0.stepgen.03.velocity-cmd <== z-output 26 float OUT 0 hm2_7i95.0.stepgen.03.velocity-fb 26 bit IN TRUE hm2_7i95.0.stepgen.04.control-type 26 s32 OUT 0 hm2_7i95.0.stepgen.04.counts 26 float OUT 0 hm2_7i95.0.stepgen.04.dbg_err_at_match 26 float OUT 0 hm2_7i95.0.stepgen.04.dbg_ff_vel 26 float OUT 0 hm2_7i95.0.stepgen.04.dbg_pos_minus_prev_cmd 26 float OUT 0 hm2_7i95.0.stepgen.04.dbg_s_to_match 26 s32 OUT 0 hm2_7i95.0.stepgen.04.dbg_step_rate 26 float OUT 0 hm2_7i95.0.stepgen.04.dbg_vel_error 26 bit IN FALSE hm2_7i95.0.stepgen.04.enable <== a-enable 26 float IN 0 hm2_7i95.0.stepgen.04.position-cmd 26 float OUT 0 hm2_7i95.0.stepgen.04.position-fb 26 float IN 0 hm2_7i95.0.stepgen.04.velocity-cmd <== a-output 26 float OUT 0 hm2_7i95.0.stepgen.04.velocity-fb 26 bit IN FALSE hm2_7i95.0.stepgen.05.control-type 26 s32 OUT 0 hm2_7i95.0.stepgen.05.counts 26 float OUT 0 hm2_7i95.0.stepgen.05.dbg_err_at_match 26 float OUT 0 hm2_7i95.0.stepgen.05.dbg_ff_vel 26 float OUT 0 hm2_7i95.0.stepgen.05.dbg_pos_minus_prev_cmd 26 float OUT 0 hm2_7i95.0.stepgen.05.dbg_s_to_match 26 s32 OUT 0 hm2_7i95.0.stepgen.05.dbg_step_rate 26 float OUT 0 hm2_7i95.0.stepgen.05.dbg_vel_error 26 bit IN FALSE hm2_7i95.0.stepgen.05.enable 26 float IN 0 hm2_7i95.0.stepgen.05.position-cmd 26 float OUT 0 hm2_7i95.0.stepgen.05.position-fb 26 float IN 0 hm2_7i95.0.stepgen.05.velocity-cmd 26 float OUT 0 hm2_7i95.0.stepgen.05.velocity-fb 26 s32 IN -1 hm2_7i95.0.stepgen.timer-number 26 bit I/O FALSE hm2_7i95.0.watchdog.has_bit 26 s32 OUT 46599 hm2_7i95.0.write.time

typing mesaflash --device 7i95 --readhmid:
Code:
Configuration Name: HOSTMOT2 General configuration information: BoardName : MESA7I95 FPGA Size: 9 KGates FPGA Pins: 144 Number of IO Ports: 2 Width of one I/O port: 29 Clock Low frequency: 100.0000 MHz Clock High frequency: 200.0000 MHz IDROM Type: 3 Instance Stride 0: 4 Instance Stride 1: 64 Register Stride 0: 256 Register Stride 1: 256 Modules in configuration: Module: DPLL There are 1 of DPLL in configuration Version: 0 Registers: 7 BaseAddress: 7000 ClockFrequency: 100.000 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Module: WatchDog There are 1 of WatchDog in configuration Version: 0 Registers: 3 BaseAddress: 0C00 ClockFrequency: 100.000 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Module: IOPort There are 2 of IOPort in configuration Version: 0 Registers: 5 BaseAddress: 1000 ClockFrequency: 100.000 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Module: MuxedQCount There are 6 of MuxedQCount in configuration Version: 3 Registers: 5 BaseAddress: 3600 ClockFrequency: 100.000 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Module: MuxedQCountSel There are 1 of MuxedQCountSel in configuration Version: 0 Registers: 0 BaseAddress: 0000 ClockFrequency: 100.000 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Module: SSerial There are 1 of SSerial in configuration Version: 0 Registers: 6 BaseAddress: 5B00 ClockFrequency: 100.000 MHz Register Stride: 256 bytes Instance Stride: 64 bytes Module: StepGen There are 6 of StepGen in configuration Version: 2 Registers: 10 BaseAddress: 2000 ClockFrequency: 100.000 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Module: SSR There are 1 of SSR in configuration Version: 0 Registers: 2 BaseAddress: 7D00 ClockFrequency: 100.000 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Module: InMux There are 1 of InMux in configuration Version: 0 Registers: 5 BaseAddress: 8000 ClockFrequency: 100.000 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Module: LED There are 1 of LED in configuration Version: 0 Registers: 1 BaseAddress: 0200 ClockFrequency: 100.000 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Configuration pin-out: IO Connections for Step/DIR+Serial+Encoders Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir 0 0 IOPort StepGen 0 Step/Table1 (Out) 0 1 IOPort StepGen 0 Dir/Table2 (Out) 0 2 IOPort StepGen 1 Step/Table1 (Out) 0 3 IOPort StepGen 1 Dir/Table2 (Out) 0 4 IOPort StepGen 2 Step/Table1 (Out) 0 5 IOPort StepGen 2 Dir/Table2 (Out) 0 6 IOPort StepGen 3 Step/Table1 (Out) 0 7 IOPort StepGen 3 Dir/Table2 (Out) 0 8 IOPort StepGen 4 Step/Table1 (Out) 0 9 IOPort StepGen 4 Dir/Table2 (Out) 0 10 IOPort StepGen 5 Step/Table1 (Out) 0 11 IOPort StepGen 5 Dir/Table2 (Out) 0 12 IOPort SSerial 0 RXData0 (In) 0 13 IOPort SSerial 0 TXData0 (Out) 0 14 IOPort SSerial 0 TXEn0 (Out) 0 15 IOPort SSerial 0 RXData1 (In) 0 16 IOPort SSerial 0 TXData1 (Out) 0 17 IOPort SSerial 0 TXEn1 (Out) 0 18 IOPort MuxedQCount 0 MuxQ-A (In) 0 19 IOPort MuxedQCount 0 MuxQ-B (In) 0 20 IOPort MuxedQCount 0 MuxQ-IDX (In) 0 21 IOPort MuxedQCount 1 MuxQ-A (In) 0 22 IOPort MuxedQCount 1 MuxQ-B (In) 0 23 IOPort MuxedQCount 1 MuxQ-IDX (In) 0 24 IOPort MuxedQCount 2 MuxQ-A (In) 0 25 IOPort MuxedQCount 2 MuxQ-B (In) 0 26 IOPort MuxedQCount 2 MuxQ-IDX (In) 0 27 IOPort MuxedQCountSel 0 MuxSel0 (Out) 0 28 IOPort InMux 0 Addr0 (Out) IO Connections for I/O+Expansion Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir 0 29 IOPort InMux 0 Addr1 (Out) 0 30 IOPort InMux 0 Addr2 (Out) 0 31 IOPort InMux 0 Addr3 (Out) 0 32 IOPort InMux 0 Addr4 (Out) 0 33 IOPort InMux 0 Data0 (In) 0 34 IOPort SSR 0 Out-00 (Out) 0 35 IOPort SSR 0 Out-01 (Out) 0 36 IOPort SSR 0 Out-02 (Out) 0 37 IOPort SSR 0 Out-03 (Out) 0 38 IOPort SSR 0 Out-04 (Out) 0 39 IOPort SSR 0 Out-05 (Out) 0 40 IOPort SSR 0 AC Ref (Out) 0 41 IOPort None 0 42 IOPort None 0 43 IOPort None 0 44 IOPort None 0 45 IOPort None 0 46 IOPort None 0 47 IOPort None 0 48 IOPort None 0 49 IOPort None 0 50 IOPort None 0 51 IOPort None 0 52 IOPort None 0 53 IOPort None 0 54 IOPort None 0 55 IOPort None 0 56 IOPort None 0 57 IOPort None

in linuxcnc "show hal configuration" the value of hm2_7i95.0.gpio.00.in is always false (i tryed to put 12v on pin 0 and ground incom 0/1)

do I have the wrong bit-file on mesa card?

I also become this error in linuxcnc: hm2_7i95.0 error finishng read! iter=296736

I'm arround this problem from a week, I searched everywhere and tryed with lcnc 2.8 first and now with the 2.9master but without finding the problem...

Thankyou for help!
Francesco

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