7i97+7i85 bit file

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21 Feb 2023 02:04 #264931 by PCW
Replied by PCW on topic 7i97+7i85 bit file
7i97+7I85 with fixed encoders (0..5 on 7I95, 6..9 on 7I85)

 

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File Name: 7i97_7i85d...2-20.zip
File Size:124 KB

 
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21 Feb 2023 08:03 #264933 by craigs711btm
Replied by craigs711btm on topic 7i97+7i85 bit file
General configuration information:

BoardName : MESA7I97
FPGA Size: 9 KGates
FPGA Pins: 144
Number of IO Ports: 3
Width of one I/O port: 17
Clock Low frequency: 100.0000 MHz
Clock High frequency: 200.0000 MHz
IDROM Type: 3
Instance Stride 0: 4
Instance Stride 1: 64
Register Stride 0: 256
Register Stride 1: 256

Modules in configuration:

Module: DPLL
There are 1 of DPLL in configuration
Version: 0
Registers: 7
BaseAddress: 7000
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Module: WatchDog
There are 1 of WatchDog in configuration
Version: 0
Registers: 3
BaseAddress: 0C00
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Module: IOPort
There are 3 of IOPort in configuration
Version: 0
Registers: 5
BaseAddress: 1000
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Module: MuxedQCount
There are 10 of MuxedQCount in configuration
Version: 4
Registers: 5
BaseAddress: 3600
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Module: MuxedQCountSel
There are 1 of MuxedQCountSel in configuration
Version: 0
Registers: 0
BaseAddress: 0000
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Module: SSerial
There are 1 of SSerial in configuration
Version: 0
Registers: 6
BaseAddress: 5B00
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 64 bytes

Module: PWM
There are 6 of PWM in configuration
Version: 0
Registers: 5
BaseAddress: 4100
ClockFrequency: 200.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Module: SSR
There are 1 of SSR in configuration
Version: 0
Registers: 2
BaseAddress: 7D00
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Module: InMux
There are 1 of InMux in configuration
Version: 0
Registers: 5
BaseAddress: 8000
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Module: LED
There are 1 of LED in configuration
Version: 0
Registers: 1
BaseAddress: 0200
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Configuration pin-out:

IO Connections for TB1/TB2/TB3 -> 7I97_0
Pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir

TB3-4 0 IOPort PWM 0 PWM (Out)
TB3-8 1 IOPort PWM 1 PWM (Out)
TB3-12 2 IOPort PWM 2 PWM (Out)
TB3-16 3 IOPort PWM 3 PWM (Out)
TB3-20 4 IOPort PWM 4 PWM (Out)
TB3-20 5 IOPort PWM 4 /Enable (Out)
TB3-24 6 IOPort PWM 5 PWM (Out)
TB3-24 7 IOPort PWM 5 /Enable (Out)
TB3-4,8,12,16 8 IOPort PWM 0 /Enable (Out)
TB1-1,2,9,10 9 IOPort MuxedQCount 0 MuxQ-A (In)
TB1-4,5,12,13 10 IOPort MuxedQCount 0 MuxQ-B (In)
TB1-7,8,15,16 11 IOPort MuxedQCount 0 MuxQ-IDX (In)
TB1-17,18,TB2 1,2 12 IOPort MuxedQCount 1 MuxQ-A (In)
TB1-20,21,TB2-4,5 13 IOPort MuxedQCount 1 MuxQ-B (In)
TB1-23,24,TB2-7,8 14 IOPort MuxedQCount 1 MuxQ-IDX (In)
TB2-9,10,17,18 15 IOPort MuxedQCount 2 MuxQ-A (In)
TB2-12,13,20,21 16 IOPort MuxedQCount 2 MuxQ-B (In)

IO Connections for TB4/TB5 -> 7I97_1
Pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir

TB2-15,16,23,24 17 IOPort MuxedQCount 2 MuxQ-IDX (In)
Internal-EncMux 18 IOPort MuxedQCountSel 0 MuxSel0 (Out)
TB5-13,14 19 IOPort SSR 0 Out-00 (Out)
TB5-15,16 20 IOPort SSR 0 Out-01 (Out)
TB5-17,18 21 IOPort SSR 0 Out-02 (Out)
TB5-19,20 22 IOPort SSR 0 Out-03 (Out)
TB5-21,22 23 IOPort SSR 0 Out-04 (Out)
TB5-23,24 24 IOPort SSR 0 Out-05 (Out)
Internal 25 IOPort SSR 0 AC Ref (Out)
Internal 26 IOPort InMux 0 Addr0 (Out)
Internal 27 IOPort InMux 0 Addr1 (Out)
Internal 28 IOPort InMux 0 Addr2 (Out)
Internal 29 IOPort InMux 0 Addr3 (Out)
Internal 30 IOPort InMux 0 Data0 (In)
TB4-15,16 31 IOPort SSerial 0 RXData0 (In)
TB4-17,18 32 IOPort SSerial 0 TXData0 (Out)
Internal-TXEn 33 IOPort SSerial 0 TXEn0 (Out)

IO Connections for P1 -> 7I97_2
Pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir

P1-01/DB25-01 34 IOPort SSerial 0 RXData5 (In)
P1-02/DB25-14 35 IOPort SSerial 0 TXData5 (Out)
P1-03/DB25-02 36 IOPort SSerial 0 RXData4 (In)
P1-04/DB25-15 37 IOPort SSerial 0 TXData4 (Out)
P1-05/DB25-03 38 IOPort SSerial 0 RXData3 (In)
P1-06/DB25-16 39 IOPort SSerial 0 TXData3 (Out)
P1-07/DB25-04 40 IOPort SSerial 0 RXData2 (In)
P1-08/DB25-17 41 IOPort SSerial 0 TXData2 (Out)
P1-09/DB25-05 42 IOPort SSerial 0 RXData1 (In)
P1-11/DB25-06 43 IOPort SSerial 0 TXData1 (Out)
P1-13/DB25-07 44 IOPort MuxedQCountSel 0 MuxSel0 (Out)
P1-15/DB25-08 45 IOPort MuxedQCount 0 MuxQ-A (In)
P1-17/DB25-09 46 IOPort MuxedQCount 0 MuxQ-B (In)
P1-19/DB25-10 47 IOPort MuxedQCount 0 MuxQ-IDX (In)
P1-21/DB25-11 48 IOPort MuxedQCount 1 MuxQ-A (In)
P1-23/DB25-12 49 IOPort MuxedQCount 1 MuxQ-B (In)
P1-25/DB25-13 50 IOPort MuxedQCount 1 MuxQ-IDX (In)

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21 Feb 2023 08:56 #264941 by Tesremos
Replied by Tesremos on topic 7i97+7i85 bit file
Wahhoo we have encoder action now! will test SSerial soon! :)

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21 Feb 2023 10:06 #264944 by craigs711btm
Replied by craigs711btm on topic 7i97+7i85 bit file
Okay, so still no SSerial action.
loadrt hm2_eth board_ip="192.168.1.121" config=" num_encoders=10 num_pwmgens=6 num_stepgens=0 num_sserials=1 sserial_port_0=0011xxxx"

the config is 7i97 - 7i85
with 2x 7i84 connected to sserial port 0 and 1 on the 7i85

vfield and vin are conencted and powered on the 7i84's, and have confirmed the 7i85 is communicating by attaching encoders to it and ensuring they read out in halshow.


where do i go from here? is my hal string correct for the sserial?

TIA

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21 Feb 2023 11:12 #264945 by saquzi
Replied by saquzi on topic 7i97+7i85 bit file
loadrt hm2_eth board_ip="10.10.10.10" config="num_encoders=6 num_pwmgens=0 sserial_port_0=0011xxxx"

It seems that now i have atleast sserial working on the 7i85, it drives the servo through 8i20 But I don't see the additional encoders or sserial in hal show? I think that it is because of the "sserial_port_0=0011xxxx"" is wrong at me, havent found yet how it should be.

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21 Feb 2023 11:21 #264946 by Tesremos
Replied by Tesremos on topic 7i97+7i85 bit file
youd want num_encoder=10

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22 Feb 2023 16:39 #265038 by saquzi
Replied by saquzi on topic 7i97+7i85 bit file
Atleast first three encoder inputs and sserial works now at the 7i85, thanks!

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22 Feb 2023 21:17 #265069 by Tesremos
Replied by Tesremos on topic 7i97+7i85 bit file
we still cannot get SSerial to work :(

can you share a txt with the output of your readhmid ? so i can compare vs what we get?

and a out put of your mesaflash --device 7i97 --sserial aswell

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26 Feb 2023 19:26 #265433 by craigs711btm
Replied by craigs711btm on topic 7i97+7i85 bit file
Can anyone shed any light on this
We still can't get the 7i84s to connect

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26 Feb 2023 20:03 #265434 by PCW
Replied by PCW on topic 7i97+7i85 bit file
Perhaps CAT5/6 cable wiring?

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