In the documentation I included now examples for the 5A-75B, with in total 6 configurations:
- different version of the board (V6.1, V7.0 and V8.0)
combination of GPIO, PWM, StepGen and Encoders or GPIO only.
For the configuration I've added both indexed versions and named versions. In the named version the name of the pin is the physical position, i.e. pin
j1:1 is pin 1 on the first connector. Tomorrow I'll upload some more examples for the 5A-75E.
When compiling one of the examples I noticed timing issues when using 6 stepgens. Perhaps the board has to be throttled down to 25 MHz to meet the timing requirements. Timing wise the board can be throttled back way further. However this requires some changes on the pre-scaler of the stepgen. This one is now fixed for 400 kHz max step rate @ 50 MHz clock. I think the pre-scaler should be more flexible and automatically adapt itself when lower clock-speeds are used.