LinuxCNC-RIO - RealtimeIO for LinuxCNC based on FPGA (ICE40 / ECP5)

Another possibility is marginal timing.

Either too narrow step pulse widths,
or insufficient setup times from DIR change to
STEP or insufficient hold times from STEP
to DIR change.

My tests on both the ICEBreakerV1.0e and Tana Nano9k yielded the same results, not due to the FPGA brand, noise, or settings.
I noticed that the Dir PIN output returns to its original position after the step action is completed. This may be because the DIR operation is not yet complete, but the STEP operation occurs prematurely, causing an error.

can you post your json config please, i will check it.
you can also try to invert the step pulse in rio, maybe thats the problem.

Another possible cause could be that the deadband value is too high. Does the zero position drift, or does it remain stable with the same offset? How large is the deviation from the actual zero point (approximately 1, 10, 100, or 1,000 steps)?

I checked the stepdir generator again in Verilog/GTKWave and tested a few edge cases.
I noticed that a pulse can be strtched if the velocity drops to 0 at the wrong moment, so I fixed that.
But that shouldn't have anything to do with your problem; it's more of a cosmetic change than a bug fix.
(in the dev branch)