ColorCNC Colorlight 5A-75E/5A-75B as FPGA controller board

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27 Jul 2022 21:19 #248469 by muvideo
First I would try to understand what are the errors message telling, from the video I'm not sure what are they about.
Second, I would verify that the board remains enabled after the error, I would also monitor the difference between commanded velocity and velocity feedback. Halscope can be useful e for this last measurement.

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30 Jul 2022 15:25 #248676 by vit74vit

New bug

svb please post you hal file. I can try testing Fabio firmware
 

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01 Aug 2022 18:34 #248803 by svb

svb please post you hal file. I can try testing Fabio firmware

 

File Attachment:

File Name: svb-FABIO_...8-01.ini
File Size:3 KB

File Attachment:

File Name: svb-FABIO_...8-01.hal
File Size:6 KB
Attachments:

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04 Aug 2022 07:26 #249009 by vit74vit
SVB Thanks to the file.
As I understood from the video, the machine moved behind hardware zeros (home limits X,Y) and gave an error. If you move processing to the workspace, everything works correctly. I checked it many times.

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04 Aug 2022 19:51 #249065 by svb
@vit74vit, Please read cnc-club personal message

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10 Aug 2022 20:32 #249475 by TOLP2
Woo, this thread exploded while on holiday. Good to see you active and many thanks to svb to help other users out.

As the problems with stepgen still persist, I will look into that coming weekend.

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12 Aug 2022 05:03 #249575 by vit74vit
Dear Peter. 
I found a bug in the register reading function from the FPGA.
In driver package has structure: Watchdog (32),WallClock(64),GPIO_IN(32), .......
In reality, there is no Watchdog in the package. 
The starting address of the read buffer is shifted by the size of Watchdog (32), which leads to errors described by me and SVB.
P/S: Peter,  you can post an example of how to use litexcnc_debug, now I have added the debug info  to litexcnc.c.
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The following user(s) said Thank You: TOLP2

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12 Aug 2022 21:17 #249623 by TOLP2
Which method did you use to print this out?

To check whether the watchdog data is missing or the datastream is mis-aligned I would like to have your configuration.

I'm very keen on solving this problem. With the data from svb I've verified so far:
- it is not due to an error in the driver (I replaced the driver and it still worked)
- it is not due to an error in the HAL-file (his HAL-file works with my card).

Other words: I was not able to reproduce the error. Next step is to verify the firmware. Somewhere something has changed, now to find where. Thanks a lot for the lead to look.

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13 Aug 2022 08:14 #249633 by romanetz
Can you show the firmware compilation report?
I mean, if a logic design cannot handle working frequency properly (so called "timing slacks"), one will get some strange unreproducible errors.

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13 Aug 2022 10:44 - 13 Aug 2022 10:53 #249640 by vit74vit
Peter!
i find an error occurred in the size calculation.
The value is 4 bytes larger than it should be. This results in a shift of one register when reading from the FPGA.

file stepgen.h (137)

#define LITEXCNC_BOARD_STEPGEN_DATA_WRITE_SIZE(litexcnc) ((litexcnc->stepgen.num_instances?sizeof(litexcnc_stepgen_general_write_data_t):0) + LITEXCNC_STEPGEN_INSTANCE_WRITE_DATA_SIZE*litexcnc->stepgen.num_instances)
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Last edit: 13 Aug 2022 10:53 by vit74vit.

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